tag: Robert Bosch

Chip Industry Week In Review
By The SE Staff - 29 Nov, 2024 - Comments: 0

Intel CEO Pat Gelsinger retired on Dec. 1, according to the company. He will be replaced by two interim co-CEOs, David Zinsner, who also continues to serve as CFO  and Michelle Johnston Holthaus, who has been named CEO of Intel Products. In addition, Frank Yeary was named interim executive chairman. Intel has been under pressure investors as non-traditional rivals, including Arm and NVIDIA, co... » read more

Chip Industry Technical Paper Roundup: June 25
By Linda Christensen - 25 Jun, 2024 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library. [table id=236 /] More ReadingTechnical Paper Library home » read more

NeuroHammer Attacks on ReRAM-Based Memories
By Technical Paper Link - 21 Jun, 2024 - Comments: 0

A new technical paper titled "NVM-Flip: Non-Volatile-Memory BitFlips on the System Level" was published by researchers at Ruhr-University Bochum, University of Duisburg-Essen, and Robert Bosch. Abstract "Emerging non-volatile memories (NVMs) are promising candidates to substitute conventional memories due to their low access latency, high integration density, and non-volatility. These super... » read more

Chip Industry Technical Paper Roundup: April 30
By Linda Christensen - 30 Apr, 2024 - Comments: 0

These new technical papers were recently added to Semiconductor Engineering’s library. [table id=222 /] Find more technical papers here. » read more

Chip Industry Week In Review
By The SE Staff - 19 Apr, 2024 - Comments: 0

SK hynix and TSMC plan to collaborate on HBM4 development and next-generation packaging technology, with plans to mass produce HBM4 chips in 2026. The agreement is an early indicator for just how competitive, and potentially lucrative, the HBM market is becoming. SK hynix said the collaboration will enable breakthroughs in memory performance with increased density of the memory controller at t... » read more

In-Memory Computing: Techniques for Error Detection and Correction
By Technical Paper Link - 16 Apr, 2024 - Comments: 0

A new technical paper titled "Error Detection and Correction Codes for Safe In-Memory Computations" was published by researchers at Robert Bosch, Forschungszentrum Julich, and Newcastle University. Abstract "In-Memory Computing (IMC) introduces a new paradigm of computation that offers high efficiency in terms of latency and power consumption for AI accelerators. However, the non-idealities... » read more

Chip Industry Week In Review
By The SE Staff - 05 Jan, 2024 - Comments: 0

By Susan Rambo, Jesse Allen, and Liz Allan The U.S. government will provide about $162 million in federal incentives, under the CHIPS and Science Act, to help Microchip onshore its semiconductor supply chain. The move is aimed at securing a reliable domestic supply of MCUs and mature-node chips. “Today’s announcement will help propel semiconductor manufacturing projects in Colorado and O... » read more

Research Bits: November 6
By Jesse Allen - 06 Nov, 2023 - Comments: 0

Fast superatomic semiconductor Researchers from Columbia University created a fast and efficient superatomic semiconductor material based on rhenium called Re6Se8Cl2. Rather than scattering when they come into contact with phonons, excitons in Re6Se8Cl2 bind with phonons to create new quasiparticles called acoustic exciton-polarons. Although polarons are found in many materials, those in Re6Se... » read more

Chip Industry’s Technical Paper Roundup: October 24
By Liz Allan - 24 Oct, 2023 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=157 /] More Reading Technical Paper Library home » read more

FeFET Multi-Level Cells For In-Memory Computing In 28nm
By Technical Paper Link - 19 Oct, 2023 - Comments: 0

A technical paper titled “First demonstration of in-memory computing crossbar using multi-level Cell FeFET” was published by researchers at Robert Bosch, University of Stuttgart, Indian Institute of Technology Kanpur, Fraunhofer IPMS, RPTU Kaiserslautern-Landau, and Technical University of Munich. Abstract: "Advancements in AI led to the emergence of in-memory-computing architectures as a... » read more

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