Chip Industry Technical Paper Roundup: May 19


New technical papers recently added to Semiconductor Engineering’s library: Technical Paper Research Organizations Micro-Transfer Printing on Silicon Photonics: Tutorial, Recent Progress and Outlook 🔗 Ghent U., imec Challenges and prospects of 2D electronics for future monolithic CFETs 🔗 SKKU, Hanyang U. et al. A Device-Physics-Informed Artific... » read more

HW-Based Image Generation Using FTJs (SNU, Sungkyunkwan U., SK hynix et al.)


A new technical paper, "CMOS-compatible ferroelectric tunnel junctions integrate stochastic sampling and deterministic computing for image generation," was published by researchers at Seoul National University, Sungkyunkwan University, Hanyang University, Sogang University, and SK Hynix. Abstract "Recent progress in generative modeling has intensified the need for compact, energy-efficien... » read more

Research Bits: Oct. 21


Direct patterning with UV cross-linking Researchers from Ulsan National Institute of Science and Technology (UNIST), Yonsei University, Sungkyunkwan University, University of Chemistry and Technology Prague, and Sogang University developed a technique that enables the direct patterning of 2D semiconductor materials onto substrates without the use of toxic solvents. The process involves disp... » read more

Research Bits: Mar. 10


Incipient ferroelectricity Researchers from Penn State University and the University of Minnesota propose harnessing incipient ferroelectricity in multifunctional two-dimensional FETs to create neuromorphic computer memory. Materials with incipient ferroelectricity have no stable ferroelectric order at room temperature and need certain conditions to achieve an electrical charge. The FETs were ... » read more

Research Bits: October 3


Growing indium selenide at scale Researchers from the University of Pennsylvania, Brookhaven National Laboratory, and the Air Force Research Laboratory grew the 2D semiconductor indium selenide (InSe) on a full-size, industrial-scale wafer. It can also be deposited at temperatures low enough to integrate with a silicon chip. The team noted that producing large enough films of InSe has prove... » read more

Chip Industry’s Technical Paper Roundup: August 22


New technical papers added to Semiconductor Engineering’s library this week. [table id=129 /]   More Reading Technical Paper Library home » read more

High-Performance P-Type FET Arrays With Single-Crystal 2D Semiconductors And Fermi-Level-Tuned vdW Contact Electrodes


A technical paper titled “Fabrication of p-type 2D single-crystalline transistor arrays with Fermi-level-tuned van der Waals semimetal electrodes” was published by researchers at Ulsan National Institute of Science and Technology (UNIST), University of Pennsylvania, Institute for Basic Science (IBS), Sogang University, and Changwon National University. Abstract: "High-performance p-type t... » read more