Challenges Grow For Creating Smaller Bumps For Flip Chips

By Anne Meixner - 18 May, 2023 - Comments: 0

New bump structures are being developed to enable higher interconnect densities in flip-chip packaging, but they are complex, expensive, and increasingly difficult to manufacture. For products with high pin counts, flip-chip [1] packages have long been a popular choice because they utilize the whole die area for interconnect. The technology has been in use since the 1970s, starting with IBM�... » read more

What’s Next For High Bandwidth Memory

By Mark LaPedus - 17 Dec, 2019 - Comments: 1

A surge in data is driving the need for new IC package types with more and faster memory in high-end systems. But there are a multitude of challenges on the memory, packaging and other fronts. In systems, for example, data moves back and forth between the processor and DRAM, which is the main memory for most chips. But at times this exchange causes latency and power consumption, sometimes re... » read more

Failure Analysis Of Electronic Devices Using Scanning Acoustic Microscopy

By Yavuz Kose - 11 Jun, 2019 - Comments: 0

Scanning acoustic microscopy, or SAM, is a non-destructive technique used in failure analysis of complex devices. SAM can provide a resolution down to sub-micron thicknesses. SAM is an efficient tool for analysis of adhesion between layers and presence of possible flaws in each layer. This can be used e.g. for investigations of sealing, coating, flip-chip underfills, BGA, QFN, wafer to wafer ... » read more

Electromigration: Not Just Copper Anymore

By Katherine Derbyshire - 31 May, 2016 - Comments: 2

While integrated circuit manufacturers have worried about electromigration for a long time, until recently most of their concerns have focused on the on-chip interconnects. The larger dimensions found in integrated circuit packages have, in most cases, improved heat dissipation, reduced current density, and eliminated most [getkc id="160" kc_name="electromigration"] risks. Over the last sev... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: underfill

Challenges Grow For Creating Smaller Bumps For Flip Chips

What’s Next For High Bandwidth Memory

Failure Analysis Of Electronic Devices Using Scanning Acoustic Microscopy

Electromigration: Not Just Copper Anymore