Chip Industry Technical Paper Roundup: Mar. 11


New technical papers added to Semiconductor Engineering’s library this week. [table id=205 /] More ReadingTechnical Paper Library home » read more

K-Fault Resistant Partitioning To Assess Redundancy-Based HW Countermeasures To Fault Injections


A technical paper titled “Fault-Resistant Partitioning of Secure CPUs for System Co-Verification against Faults” was published by researchers at Université Paris-Saclay, Graz University of Technology, lowRISC, University Grenoble Alpes, Thales, and Sorbonne University. Abstract: "To assess the robustness of CPU-based systems against fault injection attacks, it is necessary to analyze the... » read more

Chip Industry’s Technical Paper Roundup: May 2


New technical papers recently added to Semiconductor Engineering’s library: [table id=95 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Using The Schottky Barrier Transistor in Various Applications & Material Systems


A new technical review paper titled "The Schottky barrier transistor in emerging electronic devices" was published by researchers at THM University of Applied Sciences, Chalmers University of Technology, CNRS, University Grenoble Alpes and others. Abstract "This paper explores how the Schottky barrier (SB) transistor is used in a variety of applications and material systems. A discussion of... » read more