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Blog Review: Jan. 13


Siemens EDA's Harry Foster tracks trends in IC and ASIC design and finds that increased design size is only one dimension of the growing complexity challenge. Synopsys' Chris Clark and Dennis Kengo Oka predicts how the automotive industry will change in 2021, including new standards for security, increased use of AI and V2X technologies, and a growing focus on software. Cadence's Paul McL... » read more

Power/Performance Bits: Dec. 1


Self-erasing chip Researchers from the University of Michigan developed self-erasing chips that could be used to prevent counterfeiting or detect tampering. The technology is based on a new material that temporarily stores energy, changing the color of the light it emits. It self-erases in a matter of days, or it can be erased on demand. "It's very hard to detect whether a device has been t... » read more

Manufacturing Bits: Nov. 3


Zeptosecond measurements A group of researchers have set a new world’s record for the shortest timespan measurement. DESY, Fritz-Haber-Institute and Goethe University Frankfurt have measured how long it takes for a photon to cross a hydrogen molecule. The result? About 247 zeptoseconds. A zeptosecond is a trillionth of a billionth of a second (10-21 seconds). This is said to be the sh... » read more

Challenges For Compute-In-Memory Accelerators


A compute-in-memory (CIM) accelerator does not simply replace conventional logic. It's a lot more complicated than that. Regardless of the memory technology, the accelerator redefines the latency and energy consumption characteristics of the system as a whole. When the accelerator is built from noisy, low-precision computational elements, the situation becomes even more complex. Tzu-Hsian... » read more

Compute-In Memory Accelerators Up-End Network Design Tradeoffs


An explosion in the amount of data, coupled with the negative impact on performance and power for moving that data, is rekindling interest around in-memory processing as an alternative to moving data back and forth between the memory and the processor. Compute-in-memory (CIM) arrays based on either conventional memory elements like DRAM and NAND flash, as well as emerging non-volatile memori... » read more

Making Sense Of PUFs


As security becomes a principal design consideration, physically unclonable functions (PUFs) are seeing renewed interest as new players emerge onto the market. PUFs can play a central role in hardware roots of trust (HRoTs), but the messaging in the market can make it confusing to understand the different types of PUF as well as their pros and cons. PUFs leverage some uncertain aspect of som... » read more

Manufacturing Bits: April 14


Complex microparticles A team of researchers have developed the world’s most complex microparticle. In the lab, researchers have assembled hierarchically organized particles with twisted spikes and polydisperse Au-Cys (gold-cysteine) nanoplatelets or nanosheets. The sheets all twist in the same direction. Cysteine is a proteinogenic amino acid. The structure is said to be more complex ... » read more

Election Security At The Chip Level


Technological advances have changed every facet of our lives, from reading to driving to cooking, but one task remains firmly rooted in 20th-century technology — voting. Electronic voting remains doggedly unavailable to most, and almost always unusable to those who have it. For more than a decade, it seems every election is accompanied by numerous reports of voting machine problems. The mo... » read more

Week in Review – IoT, Security, Autos


Products/Services Achronix Semiconductor joined Taiwan Semiconductor Manufacturing’s IP Alliance Program, part of the foundry’s Open Innovation Platform. Achronix’s Speedcore eFPGA IP is available today on TSMC 16nm FinFET Plus (16FF+) and N7 process technologies, and it will be soon available on TSMC 12nm FinFET Compact Technology (12FFC). Cadence Design Systems announced that its di... » read more

Will In-Memory Processing Work?


The cost associated with moving data in and out of memory is becoming prohibitive, both in terms of performance and power, and it is being made worse by the data locality in algorithms, which limits the effectiveness of cache. The result is the first serious assault on the von Neumann architecture, which for a computer was simple, scalable and modular. It separated the notion of a computatio... » read more

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