tag: University of Southampton

Chip Industry’s Technical Paper Roundup: Dec 5
By Linda Christensen - 05 Dec, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=171 /] More ReadingTechnical Paper Library home » read more

Front-end patterning and epitaxy approach on Si photonics 220nm SOI substrates
By Technical Paper Link - 29 Nov, 2023 - Comments: 0

A new technical paper titled "Lateral Tunnel Epitaxy of GaAs in Lithographically Defined Cavities on 220 nm Silicon-on-Insulator" was published by researchers at Cardiff University and University of Southampton. Abstract "Current heterogeneous Si photonics usually bond III–V wafers/dies on a silicon-on-insulator (SOI) substrate in a back-end process, whereas monolithic integration by di... » read more

Week In Review: Design, Low Power
By Susan Rambo - 28 Jul, 2023 - Comments: 0

Arm is helping to address the ongoing talent shortage through its newly announced Semiconductor Education Alliance, with a long list of partners, including Arduino, Cadence, Cornell University, Semiconductor Research Corp., STMicroelectronics,Synopsys, Taiwan Semiconductor Research Institute, the All-India Council for Technical Education, and the University of Southampton. The Alliance... » read more

Week In Review: Auto, Security, Pervasive Computing
By Liz Allan - 16 Jun, 2023 - Comments: 0

The European Parliament took a major step toward enacting the world’s first laws around the use of AI. Known as the AI Act, the draft law won a majority vote following two years of debate. If the proposed regulations pass the next hurdles, AI systems posing an unacceptable risk to human safety would be banned — along with “intrusive and discriminatory” uses of AI, including biometric su... » read more

Chip Industry’s Technical Paper Roundup: Apr. 4
By Linda Christensen - 04 Apr, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=90 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Large Area Process For Atomically Thin 2D Semiconductor, Using Scalable ALD
By Technical Paper Link - 30 Mar, 2023 - Comments: 0

A new technical paper titled "Large-area synthesis of high electrical performance MoS2  by a commercially scalable atomic layer deposition process" by researchers at the University of Southampton, LMU Munich, and VTT Technical Research Centre of Finland. Abstract: "This work demonstrates a large area process for atomically thin 2D semiconductors to unlock the technological upscale required... » read more

Research Bits: Dec. 13
By Jesse Allen - 13 Dec, 2022 - Comments: 0

Electronic-photonic interface for data centers Engineers at Caltech and the University of Southampton integrated an electronic and photonic chip for high-speed communication in data centers. "There are more than 2,700 data centers in the U.S. and more than 8,000 worldwide, with towers of servers stacked on top of each other to manage the load of thousands of terabytes of data going in and o... » read more

Chip Industry’s Technical Paper Roundup: Dec. 5
By Linda Christensen - 05 Dec, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=67 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for u... » read more

Chip Sandwich: Electronics Chip & Photonics Chip Co-Optimized To Work Together (CalTech/Univ. of Southampton)
By Technical Paper Link - 01 Dec, 2022 - Comments: 0

A technical paper titled "A 100-Gb/s PAM4 Optical Transmitter in a 3-D-Integrated SiPh-CMOS Platform Using Segmented MOSCAP Modulators" was published by researchers at CalTech and University of Southampton. "The resulting optimized interface between the two chips allows them to transmit 100 gigabits of data per second while producing just 2.4 pico-Joules per transmitted bit. This improves th... » read more

Week In Review: Semiconductor Manufacturing, Test
By Karen Heyman - 18 Nov, 2022 - Comments: 0

Chinese memory chip maker YMTC and dozens of other Chinese entities are "at risk" of being added to a trade blacklist as soon as Dec. 6, a U.S. Commerce Department official said in prepared remarks seen by Reuters. SMIC co-CEO Zhao Haijun said on an earnings call that recent export controls from the United States will have an "adverse impact" on the company's production. The U.K. has rule... » read more

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