Chip Industry Technical Paper Roundup: Feb. 16


New technical papers recently added to Semiconductor Engineering’s library: [table id=523 /] Find more semiconductor research papers here. » read more

3D Printing To Create Spatially Freeform, Nanomaterial-based Electronics (Rice, U. of Utah, NUS)


Researchers from Rice University, University of Utah and National University of Singapore (NUS) published "Three-dimensional printing of nanomaterials-based electronics with a metamaterial-inspired near-field electromagnetic structure." Abstract "Three-dimensional (3D) printing can create freeform architectures and electronics with unprecedented versatility. However, the full potential of... » read more

Chip Industry Week In Review


China's Hefei Lumiverse Technology reportedly has developed a desktop-sized High Harmonic Generation light source that generates wavelengths as small as 1nm. One customer already has used it to produce 14nm chips, which was the original target node for EUV, according to one report. As a point of comparison, TSMC and Samsung didn't start using EUV until the 7nm node, relying instead on immersion... » read more

Chip Industry Week In Review


Check out our new Inside Chips podcast. President Trump’s ‘Liberation Day’ tariffs were announced this week. The executive order stated that semiconductors and copper imports are not directly subject to the reciprocal tariff, although the exemption may be short-lived. Semiconductor equipment and tools were not mentioned, leaving the industry searching for clarification. Regardless, hig... » read more

Research Bits: Jan. 20


Self-correcting memristor array Researchers at Korea Advanced Institute of Science and Technology (KAIST), Seoul National University, Sungkyunkwan University, Electronics and Telecommunications Research Institute (ETRI), and Yonsei University developed a memristor-based neuromorphic chip that can learn and correct errors, enabling it to adapt to immediate environmental changes. The system c... » read more

Chip Industry Week In Review


By Adam Kovac, Gregory Haley, and Liz Allan. Cadence plans to acquire BETA CAE Systems for $1.24 billion, the latest volley in a race to sell multi-physics simulation and analysis across a broad set of customers with deep pockets. Cadence said the deal opens the door to structural analysis for the automotive, aerospace, industrial, and health care sectors. Under the terms of the agreement, 6... » read more

Chip Industry’s Technical Paper Roundup: Dec 5


New technical papers recently added to Semiconductor Engineering’s library: [table id=171 /] More ReadingTechnical Paper Library home » read more

Engineering chirality at wafer scale with ordered CNT architecture (Rice University and others)


A new technical paper titled "Engineering chirality at wafer scale with ordered carbon nanotube architectures" was published by researchers at Rice University, University of Utah, J.A. Woollam Co. and Tokyo Metropolitan University. Abstract "Creating artificial matter with controllable chirality in a simple and scalable manner brings new opportunities to diverse areas. Here we show two su... » read more

Technical Paper Round-Up: May 24


New technical papers added to Semiconductor Engineering’s library this week.   [table id=29 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a ... » read more

A Methodology for Automatic eFPGA redaction


New academic paper titled "ALICE: An Automatic Design Flow for eFPGA Redaction" from researchers at Politecnico di Milano, New York University, University of Calgary, and the University of Utah. Abstract "Fabricating an integrated circuit is becoming unaffordable for many semiconductor design houses. Outsourcing the fabrication to a third-party foundry requires methods to protect the intell... » read more

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