tag: USB

Week in Review: IoT, Security, Auto
By Jeff Dorsch - 16 Nov, 2018 - Comments: 0

Internet of Things Gartner identified what it says are the top 10 strategic Internet of Things technologies and trends. Number one, no surprise, is artificial intelligence. Nick Jones, research vice president at Gartner, said in a statement, “AI will be applied to a wide range of IoT information, including video, still images, speech, network traffic activity, and sensor data.” Other top t... » read more

Startup Puts Quantum Security on USB, Dongles
By Kevin Fogarty - 16 Oct, 2018 - Comments: 0

U.K. startup Quantum Base, Ltd. is one of a small number of companies betting on the benefits of quantum computing even without quantum computers. The six-and-a-half-year-old company came together largely because its technical guru was frustrated at how long it was taking to develop genuine quantum computers and wanted to find a practical, immediate use for the things he'd learned in his own... » read more

First Look At USB 3.2
By Eric Huang - 24 May, 2018 - Comments: 0

I’m super excited to write about and show to you the world’s first USB 3.2 demonstration. Go watch the video first and then read the rest. https://youtu.be/WPUvHeq_Sgs USB 3.2 hardware and software setup We implemented our USB 3.2 Device and Host in the HAPS-80 FPGA-Based hardware prototyping platform. The platforms use USB PHYs, which are implemented in a FinFET process node. ... » read more

Blog Review: Dec. 13
By Jesse Allen - 13 Dec, 2017 - Comments: 0

Mentor's Sherif Hany notes that pattern matching isn't just for litho hotspots anymore, and is increasingly being used in a wide range of early design phase checks, DRC flows, layout retargeting and fixing and DFM checks. Synopsys' Eric Huang explains why USB cables have gotten so short, even though no length is mentioned in the specification. Cadence's Paul McLellan listens in as Jeremy ... » read more

Could Liquid IP Lead To Better Chips?
By Brian Bailey - 13 Dec, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss the benefits that could come from making IP available as abstract blocks instead of RTL implementations with Mark Johnstone, technical director for Electronic Design Automation for [getentity id="22499" e_name="NXP"] Semiconductor; [getperson id="11489" p_name="Drew Wingard"], CTO at [getentity id="22605" e_name="Sonics"]; Bryan Bowyer, director of ... » read more

Blog Review: Nov. 22
By Ed Sperling - 22 Nov, 2017 - Comments: 0

ARM's Jem Davies talks about an upcoming documentary on AI and where the lines need to be drawn between machine intelligence and human emotional intelligence. Mentor's Saunder Peng examines the impact of merging physical verification databases, which can cost time and resources, and how that can be streamlined. Cadence's Paul McClellan takes a look back at the Xerox Alto and how it change... » read more

A Simple Way To Debug IIP-Based Designs And SoCs
By Synopsys - 27 Sep, 2017 - Comments: 0

Design problems that appear in the late phases of the development cycle can be extremely difficult to track down and debug, thus putting project schedules at risk. This whitepaper presents the concept of debugging with “real time simulation data” using Verdi Transaction Debug Platform (protocol analyzer, waveform viewer, source code browser) and show its benefits by taking a few generic USB... » read more

Power/Performance Bits: Aug. 22
By Jesse Allen - 22 Aug, 2017 - Comments: 0

USB data leakage Researchers from the University of Adelaide found that USB connections are vulnerable to information leakage. In testing more than 50 different computers and external USB hubs, they found that over 90% of them leaked information to an external USB device. "USB-connected devices include keyboards, cardswipers and fingerprint readers which often send sensitive information to ... » read more

The Week In Review: Design
By Jesse Allen - 28 Jul, 2017 - Comments: 0

IP Synopsys unveiled High Bandwidth Memory 2 (HBM2) IP. The package includes PHY, controller and verification IP and supports data rates up to 2400Mb/s, 20% faster than the JEDEC standard specification. The controller supports pseudo-channel operation in either lock step or memory interleaved mode, and the PHY offers four trained power management states and fast frequency switching. Cadence... » read more

Come Together Right Now Over… Virtual Prototypes
By Malte Doerper - 29 Jun, 2017 - Comments: 0

As a frequent traveler and gadgets enthusiast I love the concept of all my devices being connected. However, more often than not I experience a divide which is sometimes caused by bad software and sometimes caused by missing hardware interfaces. My recent frustration was related to my tablet missing a USB port to upload new maps to my GPS device. The GPS device became a divided, isolated pi... » read more

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