First Look At USB 3.2

By Eric Huang - 24 May, 2018 - Comments: 0

I’m super excited to write about and show to you the world’s first USB 3.2 demonstration. Go watch the video first and then read the rest. https://youtu.be/WPUvHeq_Sgs USB 3.2 hardware and software setup We implemented our USB 3.2 Device and Host in the HAPS-80 FPGA-Based hardware prototyping platform. The platforms use USB PHYs, which are implemented in a FinFET process node. ... » read more

Blog Review: Dec. 13

By Jesse Allen - 13 Dec, 2017 - Comments: 0

Mentor's Sherif Hany notes that pattern matching isn't just for litho hotspots anymore, and is increasingly being used in a wide range of early design phase checks, DRC flows, layout retargeting and fixing and DFM checks. Synopsys' Eric Huang explains why USB cables have gotten so short, even though no length is mentioned in the specification. Cadence's Paul McLellan listens in as Jeremy ... » read more

Could Liquid IP Lead To Better Chips?

By Brian Bailey - 13 Dec, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss the benefits that could come from making IP available as abstract blocks instead of RTL implementations with Mark Johnstone, technical director for Electronic Design Automation for [getentity id="22499" e_name="NXP"] Semiconductor; [getperson id="11489" p_name="Drew Wingard"], CTO at [getentity id="22605" e_name="Sonics"]; Bryan Bowyer, director of ... » read more

Blog Review: Nov. 22

By Ed Sperling - 22 Nov, 2017 - Comments: 0

ARM's Jem Davies talks about an upcoming documentary on AI and where the lines need to be drawn between machine intelligence and human emotional intelligence. Mentor's Saunder Peng examines the impact of merging physical verification databases, which can cost time and resources, and how that can be streamlined. Cadence's Paul McClellan takes a look back at the Xerox Alto and how it change... » read more

A Simple Way To Debug IIP-Based Designs And SoCs

By Synopsys - 27 Sep, 2017 - Comments: 0

Design problems that appear in the late phases of the development cycle can be extremely difficult to track down and debug, thus putting project schedules at risk. This whitepaper presents the concept of debugging with “real time simulation data” using Verdi Transaction Debug Platform (protocol analyzer, waveform viewer, source code browser) and show its benefits by taking a few generic USB... » read more

Power/Performance Bits: Aug. 22

By Jesse Allen - 22 Aug, 2017 - Comments: 0

USB data leakage Researchers from the University of Adelaide found that USB connections are vulnerable to information leakage. In testing more than 50 different computers and external USB hubs, they found that over 90% of them leaked information to an external USB device. "USB-connected devices include keyboards, cardswipers and fingerprint readers which often send sensitive information to ... » read more

The Week In Review: Design

By Jesse Allen - 28 Jul, 2017 - Comments: 0

IP Synopsys unveiled High Bandwidth Memory 2 (HBM2) IP. The package includes PHY, controller and verification IP and supports data rates up to 2400Mb/s, 20% faster than the JEDEC standard specification. The controller supports pseudo-channel operation in either lock step or memory interleaved mode, and the PHY offers four trained power management states and fast frequency switching. Cadence... » read more

Come Together Right Now Over… Virtual Prototypes

By Malte Doerper - 29 Jun, 2017 - Comments: 0

As a frequent traveler and gadgets enthusiast I love the concept of all my devices being connected. However, more often than not I experience a divide which is sometimes caused by bad software and sometimes caused by missing hardware interfaces. My recent frustration was related to my tablet missing a USB port to upload new maps to my GPS device. The GPS device became a divided, isolated pi... » read more

Building One Interface Subsystem For Multiple IoT SoCs

By Ralph Grundler - 11 May, 2017 - Comments: 0

When designing SoCs for Internet of Things (IoT) applications, designers quickly realize that their most efficient use of resources will result in chips that can address multiple end applications. Consumer products require connectivity or edge devices, and networking or enterprise companies are broadening their reach to home networking and cloud services, like remote processing, that complement... » read more

New USB Audio Class For USB Type-C Digital Headsets

By Morten Christiansen - 09 Mar, 2017 - Comments: 0

The ¼” phone jack was invented more than 100 years ago to connect people using a new invention called the “telephone.” Today, the modern variant - the 3.5mm phone jack - is widely used. As modern mobile phones are used for more than phone calls and do not have room for multiple connectors, a new approach for audio connectivity is needed, so product designers are retiring the 3.5mm jack. ... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: USB