tag: UT Austin

Security Research: Technical Paper Round-up
By Linda Christensen - 29 Aug, 2023 - Comments: 0

A number of hardware security-related technical papers were presented at the August 2023 USENIX Security Symposium. Here are some highlights with associated links. [table id=130 /] A complete listing of all papers presented at this summer's USENIX conference can be found here and here. The organization provides open access research, and the presentation slides and papers are free to the p... » read more

Week In Review: Auto, Security, Pervasive Computing
By Liz Allan - 25 Aug, 2023 - Comments: 0

The AI chip market is booming. Gartner expects revenue for the year will hit $53.4 billion, up 20.9% from 2022. The firm predicts that number will grow to $119 billion by 2027.  In the consumer electronics market, the value of AI-enabled application processors will amount to $1.2 billion in 2023, up from $558 million in 2022. Germany will spend nearly €1 billion (~US$1.7B) over the next t... » read more

Microarchitectural Side-Channel Attacks And Defenses on NVRAM DIMMs
By Technical Paper Link - 22 Aug, 2023 - Comments: 0

A new technical paper titled "NVLeak: Off-Chip Side-Channel Attacks via Non-Volatile Memory Systems" was published by researchers at UC San Diego, Purdue University, and UT Austin. This paper was included at the recent 32nd USENIX Security Symposium. Abstract: "We study microarchitectural side-channel attacks and defenses on non-volatile RAM (NVRAM) DIMMs. In this study, we first perform r... » read more

Chip Industry’s Technical Paper Roundup: May 23
By Linda Christensen - 23 May, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=104 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us... » read more

RL-Guided Detailed Routing Framework for Advanced Custom Circuits
By Technical Paper Link - 19 May, 2023 - Comments: 0

A technical paper titled "Reinforcement Learning Guided Detailed Routing for Custom Circuits" was published by researchers at UT Austin, Princeton University, and NVIDIA. "This paper presents a novel detailed routing framework for custom circuits that leverages deep reinforcement learning to optimize routing patterns while considering custom routing constraints and industrial design rules. C... » read more

Chip Industry’s Technical Paper Roundup: Mar. 28
By Linda Christensen - 28 Mar, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=89 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Feasibility of Using Domain Wall-Magnetic Tunnel Junction for Magnetic Analog Addressable Memories
By Technical Paper Link - 23 Mar, 2023 - Comments: 0

A new technical paper titled "Domain Wall-Magnetic Tunnel Junction Analog Content Addressable Memory Using Current and Projected Data" was published by researchers at UT Austin and Samsung Advanced Institute of Technology (SAIT). Abstract "With the rise in in-memory computing architectures to reduce the compute-memory bottleneck, a new bottleneck is present between analog and digital conver... » read more

Chip Industry’s Technical Paper Roundup: Mar. 21
By Linda Christensen - 21 Mar, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=88 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

Learning The AMS Circuit Representation From Layout Positions (UT Austin/ NVIDIA)
By Technical Paper Link - 15 Mar, 2023 - Comments: 0

A recent technical paper titled "TAG: Learning Circuit Spatial Embedding From Layouts" was published by researchers at UT Austin and NVIDIA. Abstract "Analog and mixed-signal (AMS) circuit designs still rely on human design expertise. Machine learning has been assisting circuit design automation by replacing human experience with artificial intelligence. This paper presents TAG, a new parad... » read more

Chip Industry’s Technical Paper Roundup: Mar. 6
By Linda Christensen - 06 Mar, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=84 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us ... » read more

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