Tech Talk: Virtual Prototyping


Bill Neifert, CTO of Carbon Design Systems, talks with about the intersection of IP and EDA, driven in particular by ARM's new architecture. [youtube vid=1OopYWmRarE] » read more

Does Fast Simulation Help Debug Productivity?


It is nice when a reporter manages to get the scoop of the century, and that was the case at a lunch panel hosted by [getentity id="22032" e_name="Cadence"] at the recent Design and Verification Conference (DVCon) in Santa Clara, CA. Brian Bailey, technology editor for Semiconductor Engineer was the moderator for the panel and broke the news to the crowd. Cadence had developed a logic [getkc id... » read more

First Time Success and Cost Control


First time success has been the ultimate goal for semiconductor companies due to escalating mask costs, as well as a guiding objective for the development of EDA tools, especially in the systems and verification space. These pressures are magnified for the [getkc id="76" comment="Internet of Things"] (IoT), especially the edge devices. Have system-level tools been able to contribute to first ti... » read more

Blog Review: March 18


How do you quantify effort spent in FPGA verification? Mentor's Harry Foster tackles the question in his latest installment of the Wilson Research Group functional verification study. A new frontier of design challenges is rapidly emerging, according to ARM CEO Simon Segars. Cadence's Brian Fuller brings us his keynote address at CDNLive. Synopsys' Tushar Mattu is back with more on AXI VI... » read more

One-To-Many: Shifting Left, Adding Gears


[getperson id="11034" comment="Aart de Geus"], chairman and co-CEO of [getentity id="22035" e_name="Synopsys"], launched into high gear for his keynote talk at this year’s Design and Verification Conference (DVCon). The gathering attracted a record number of attendees, and it is estimated that about 350 people crammed into the room to listen to him talk about the shift left that is happening ... » read more

Veloce System-Level Power Analysis And Verification


Power analysis and verification need to move to the system level, improving upon and extending the capabilities and scope of RTL and gate-level techniques. The performance, capacity, and flexibility of emulation platforms make them the ideal technology for system-level power analysis and verification. Veloce delivers unprecedented power verification and analysis capabilities. This paper shares ... » read more

Incremental Design Methodologies


There are times when we become stuck in the past, or choose to believe something that is no longer true or actually never was true. As we get older, we are all guilty of that. History tends to rewrite itself, especially given that this industry is aging. One of these situations occurred recently, and comments from an industry luminary didn’t align with the thoughts and memories of other peopl... » read more

Rethinking SoC Verification


The introduction of the iPhone in 2007 represented a fundamental shift in electronic system design: moving advanced processing power off of the desktop and into the hands of users everywhere, always. This shift has led to a revolution in mobile—the expansion into the Internet-of-Things, with wearables, connected automobiles and homes. This revolution is causing profound technology challeng... » read more

Who Pays For EDA Shift Left?


While working on the predictions articles for 2015 (markets, design, semiconductors, tools and flows), a number of companies talked about the great shift left that is happening in the industry. What was surprising was the number of companies that mentioned it, and in very different ways. It is clear that shift left does not mean the same thing to all people. While they all see it addressing ... » read more

Emulation Uses Increase


For more than two decades, [getkc id="30" comment="emulation"] was a technology in search of a market. While on paper it has always made sense to speed up simulation, using hardware acceleration was so pricey that few companies could justify the cost. Fast-forward to today and emulation is a major contributor to the bottom line at all of the Big Three [getkc id="7" kc_name="EDA"] companies. ... » read more

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