Autonomous ASIC Root Cause Analysis


By Mehir Arora and Zackary Glazewski Over 50% of frontend ASIC hardware engineering time is spent on debugging and root cause analysis, spent churning through millions of lines of code and terabytes of waveform data. Despite this, there are no existing solutions for autonomous root cause analysis that use both code and waveform data. ChipAgents Root Cause Analysis (ChipAgents RCA) is the fir... » read more

Multi-Modal AI In EDA Development Flows


RTL coding is a critical step in the development of semiconductors, but many would argue it is not the most difficult. Things become a lot more complex as you get closer to implementation, and as the system context becomes larger than can be comprehended by text alone. In both cases, layout, timing, power, and many other factors come into play, but none is as easily represented by text, and the... » read more

Key Critical Specs You Should Know Before Selecting a Function Generator


Selecting a benchtop function generator for your everyday use is very important. You want to be sure it produces the signal types that you need for your tests without introducing unwanted jitters, noise, harmonic distortions, or signal flaws. Introducing unwanted signal flaws inadvertently causes false test rejects due to your function generator. It is a common mistake to purchase the least exp... » read more

System-Level Simulation Of Technologies Supporting Enhanced Spectral Efficiency For 5G New Radio


By Gent Paparisto, Joel Kirshman, and David Vye 5G New Radio (5G NR) is the wireless standard defining the next generation of mobile networks. 5G will offer higher capacity than current 4G, enabling a higher density of mobile broadband users and supporting device-to-device and massive-machine communications. 5G research and development will support lower latency, improved reliability, and... » read more

Tech Talk: TCAM


Dennis Dudeck, IP solutions FAE at eSilicon, talks about how to save power and area with ternary content addressable memory. https://youtu.be/y1FhdoNdzOw » read more

Accuracy, Waveforms, And Power


The entire topic of power analysis, estimation, and exploration never ceases to amaze me given that opinions on how to approach this are so varied. It is that diversity of opinions that makes it that much more intriguing. I’ve been particularly interested in how I now regularly hear that users are increasingly interested in taking activity from simulation and emulation and using that to dr... » read more

Capturing Timing Diagrams In Operational SVA


Timing diagrams provide an excellent, intuitive starting point for writing assertions to capture the intended behavior of designs. However, the standard assertion languages SVA and PSL do not provide direct constructs for capturing timing diagrams. This white paper presents Operational SVA – a simple yet powerful SVA library – which allows to develop assertions directly from timing diagrams... » read more