Key Critical Specs You Should Know Before Selecting a Function Generator

By Keysight - 24 Apr, 2024 - Comments: 0

Selecting a benchtop function generator for your everyday use is very important. You want to be sure it produces the signal types that you need for your tests without introducing unwanted jitters, noise, harmonic distortions, or signal flaws. Introducing unwanted signal flaws inadvertently causes false test rejects due to your function generator. It is a common mistake to purchase the least exp... » read more

System-Level Simulation Of Technologies Supporting Enhanced Spectral Efficiency For 5G New Radio

By David Vye - 05 Feb, 2018 - Comments: 0

By Gent Paparisto, Joel Kirshman, and David Vye 5G New Radio (5G NR) is the wireless standard defining the next generation of mobile networks. 5G will offer higher capacity than current 4G, enabling a higher density of mobile broadband users and supporting device-to-device and massive-machine communications. 5G research and development will support lower latency, improved reliability, and... » read more

Tech Talk: TCAM

By Ed Sperling - 28 Sep, 2017 - Comments: 0

Dennis Dudeck, IP solutions FAE at eSilicon, talks about how to save power and area with ternary content addressable memory. https://youtu.be/y1FhdoNdzOw » read more

Accuracy, Waveforms, And Power

By Ann Mutschler - 08 Sep, 2016 - Comments: 0

The entire topic of power analysis, estimation, and exploration never ceases to amaze me given that opinions on how to approach this are so varied. It is that diversity of opinions that makes it that much more intriguing. I’ve been particularly interested in how I now regularly hear that users are increasingly interested in taking activity from simulation and emulation and using that to dr... » read more

Capturing Timing Diagrams In Operational SVA

By OneSpin Solutions - 25 May, 2016 - Comments: 0

Timing diagrams provide an excellent, intuitive starting point for writing assertions to capture the intended behavior of designs. However, the standard assertion languages SVA and PSL do not provide direct constructs for capturing timing diagrams. This white paper presents Operational SVA – a simple yet powerful SVA library – which allows to develop assertions directly from timing diagrams... » read more

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

New AI Processors Architectures Balance Speed With Efficiency

Hot Chips 24: Large language models ratchet up pressure for sustainable computing and heterogeneous integration; data management becomes key differentiator.