Blog Review: March 18


How do you quantify effort spent in FPGA verification? Mentor's Harry Foster tackles the question in his latest installment of the Wilson Research Group functional verification study. A new frontier of design challenges is rapidly emerging, according to ARM CEO Simon Segars. Cadence's Brian Fuller brings us his keynote address at CDNLive. Synopsys' Tushar Mattu is back with more on AXI VI... » read more

New Challenges For Wearables


It was Dick Tracy’s wristwatch communicator that triggered the public’s appetite for wearable electronics. Introduced in a 1946 syndicated comic strip, the idea was so compelling that it inspired the release of hundreds of wrist-based devices ranging from walkie-talkies to calculators to GPS trackers, heartbeat and movement monitors. Yet despite the public’s fascination with this kind of ... » read more

Power/Performance Bits: Oct. 28


More powerful, sensitive wearables With their special electronic and optical properties, nanomaterials such as graphene and molybdenum sulfide have created excitement among UCLA scientists for their potential to revolutionize transistors and circuits. Research is underway there that has the potential to increase the efficiency and capabilities of the 2D layered semiconductors used in high-s... » read more

Advanced Architectures And Technologies For The Development Of Wearable Devices


One of the exciting new markets expected to see the biggest growth over the next few years is that of wearable devices. According to market research firm IHS, the worldwide market for wearable technology saw revenues of $8.5 billion in 2012 based on shipments of 96 million devices. The firm predicts future increases to $30 billion and 210 million by 2018. Today it is a largely embryonic market ... » read more

More Than Moore


Semiconductor Engineering sat down to discuss the value of feature shrinks and what comes next with Steve Eplett, design technology and automation manager at [getentity id="22664" e_name="Open-Silicon"]; Patrick Soheili, vice president and general manager of IP Solutions at [getentity id="22242" e_name="eSilicon"]; Brandon Wang, engineering group director at [getentity id="22032" e_name="Cadenc... » read more

IP And FinFETs At Advanced Nodes


Semiconductor Engineering sat down to discuss IP and finFETs at advanced nodes with Bernard Murphy, CTO of Atrenta; Warren Savage, president and CEO of IPextreme; Aveek Sarkar, vice president of engineering and product support at Ansys-Apache; Randy Smith, vice president of marketing at Sonics. What follows are excerpts of that conversation. SE: As we push into the next nodes, we’ve got a ... » read more

CEVA Targets Wearables


Coinciding with the announcement of an integrated platform based on a single TeakLite-4 DSP, handling Audio/Voice, Sensor Fusion, always-on UI and Connectivity- Linley Group Mobile Chip Report, By Linley Gwennap (May 5, 2014) describes how CEVA’s new and ground breaking platform is a starter kit of hardware and software blocks that a company can use to build a processor for its wearable produ... » read more

The New Face Of MCUs


For years, the humble microcontroller was known as the workhorse of white goods and other embedded applications that required some amount of processing, but not as much as a microprocessor would provide. Much has changed since then. Today’s MCUs are the star components in fast-growing and increasingly sophisticated application areas such as automotive, smartphones and the Internet of Thing... » read more

IoT Creates New IP Requirements


With the rise of smart cities, cars and houses, an enhanced connectivity infrastructure bolstered by an increasingly connected culture, the Internet of Things (IoT) represents an exciting opportunity for semiconductor industry players. As such, market researchers at IDC expect the installed base of the Internet of Things will be approximately 212 billion "things" globally by the end of 2020 ... » read more

Newer posts →