tag: Xilinx

Chiplets: Deep Dive Into Designing, Manufacturing, And Testing
By The SE Staff - 07 Aug, 2023 - Comments: 0

Chiplets are a disruptive technology. They change the way chips are designed, manufactured, tested, packaged, as well as the underlying business relationships and fundamentals. But they also open the door to vast new opportunities for existing chipmakers and startups to create highly customized components and systems for specific use cases and market segments. This LEGO-like approach sounds ... » read more

The Other Side Of The Wafer: The Latest Developments In Backside Power Delivery
By Sandy Wen - 16 Feb, 2023 - Comments: 0

At the beginning of my career in semiconductor equipment, the backside of the wafer was a source of anxiety. In one memorable instance in my early career, several wafers flew off a robot blade during a wafer transfer. After cleaning up the mess, we remembered that a variety of thin films could be deposited on the wafer backside, which could decrease its friction coefficient. Slowing down the wa... » read more

Emulation System for Racetrack Memories Based on FPGA
By Technical Paper Link - 13 Feb, 2023 - Comments: 0

A technical paper titled "ERMES: Efficient Racetrack Memory Emulation System based on FPGA" was written by researchers at University of Calabria and TU Dresden. "This paper presents a new emulation system for RTMs based on heterogeneous FPGA-CPU Systems-on-Chips (SoCs). Thanks to its high flexibility, the proposed emulator can be easily configured to evaluate different memory architectures. ... » read more

What Future Processors Will Look Like
By Ed Sperling - 13 Jul, 2022 - Comments: 0

Mark Papermaster, CTO at AMD, sat down with Semiconductor Engineering to talk about architectural changes that are required as the benefits of scaling decrease, including chiplets, new standards for heterogeneous integration, and different types of memory. What follows are excerpts of that conversation. SE: What does a processor look like in five years? Is it a bunch of chips in a package? I... » read more

Security Risks Widen With Commercial Chiplets
By Ed Sperling - 07 Jul, 2022 - Comments: 0

The commercialization of chiplets is expected to increase the number and breadth of attack surfaces in electronic systems, making it harder to keep track of all the hardened IP jammed into a package and to verify its authenticity and robustness against hackers. Until now this has been largely a non-issue, because the only companies using chiplets today — AMD, Intel, and Marvell — interna... » read more

Week In Review: Design, Low Power
By Jesse Allen - 01 Jul, 2022 - Comments: 0

IP, design Arm unveiled a number of new CPUs and GPUs. Based on the Armv9 architecture, the Cortex-X3 aims to improve single-threaded performance and targets a range of benchmarks and applications. The Cortex-A715 focuses on efficient performance, delivering a 20% energy efficiency gain and 5% performance uplift compared to Cortex-A710. In addition, the Cortex-A510 and DSU-110 were updated to ... » read more

Kria KR260 Robotics Starter Kit: Unleashing Roboticists Through Hardware Acceleration
By AMD - 01 Jun, 2022 - Comments: 0

The Kria™ KR260 Robotics Starter Kit is a Kria SOM-based development platform for robotics and factory automation applications. It enables roboticists and industrial developers without FPGA expertise to develop hardware accelerated applications for robotics, machine vision, industrial communications and control. Developers benefit with greater flexibility from native ROS 2 (Humble Hawksb... » read more

How To Optimize A Processor
By Brian Bailey - 26 May, 2022 - Comments: 0

Optimizing any system is a multi-layered problem, but when it involves a processor there are at least three levels to consider. Architects must be capable of thinking across these boundaries because the role of each of the layers must be both understood and balanced. The first level of potential optimization is at the system level. For example, how does data come in and out of the processing... » read more

Week In Review: Design, Low Power
By Jesse Allen - 20 May, 2022 - Comments: 0

Cadence's digital full flow was certified for the GlobalFoundries 12LP/12LP+ process platforms. The certified tools include the Innovus Implementation System, Genus Synthesis Solution, Tempus Timing Signoff Solution, Voltus IC Power Integrity Solution, Quantus Extraction Solution, Litho Physical Analyzer (LPA), and Pegasus Verification System. Siemens Digital Industries Software's Calibre nm... » read more

Week In Review: Design, Low Power
By Jesse Allen - 13 May, 2022 - Comments: 0

Tools & IP MIPS announced its first products based on the RISC-V ISA. The eVocore IP cores are designed to provide a flexible foundation for heterogeneous compute, supporting combinations of eVocore processors as well as other accelerators, with a Coherence Manager that maintains L2 cache and system-level coherency between all cores, main memory, and I/O devices. They target high-performan... » read more

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