Yield Enhancement Technology: Efforts To Suppress Nanosized Particles In Semiconductor Production Equipment


The currently dominant semiconductor process size is in the range between a few and a few dozen nanometers. That means if a nanosized particle smaller than a virus (hereinafter simply “particle”) is present on a silicon substrate, it could cause a defect in the semiconductor device, lowering the production yield (i.e., the percentage of good chips produced in a manufacturing process). Preve... » read more

Adaptive Test Gains Ground


Not all devices get tested the same way anymore, and that’s a good thing. Quality, test costs, and yield have motivated product engineers to adopt test processes that fall under the umbrella of adaptive test, which uses test data to modify a subsequent test process. But to execute such techniques requires logistics that support analysis of data, as well as enabling changes to a test based ... » read more

Virtual Fabrication At 7/5/3nm


David Fried, vice president of computational products at Lam Research, digs into virtual fabrication at the most advanced nodes, how to create models using immature processes at new nodes, and how to fuse together data from multiple different silos. » read more

Increase In Analog Problems


Analog and mixed signal design has always been tough, but a resent survey suggests that the industry has seen significantly increased failures in the past year because the analog circuitry within an ASIC was out of tolerance. What is causing this spike in failures? Is it just a glitch in the data, or are these problems real? The answer is complicated, and to a large extent it depends heavily... » read more

Week In Review: Design, Low Power


Tools & IP Cadence debuted System-Level Verification IP (System VIP), a suite of tools and libraries for automating SoC testbench assembly, bus and CPU traffic generation, cache-coherency validation, and system performance bottleneck analysis. Tests created using the System VIP solution are portable across Cadence simulation, emulation and prototyping engines and can also be extended to po... » read more

Key Aspects Of Yield Management Systems For Fabless Startups


Do you work for a fabless start-up? Are you ramping up? If so, you need data-analysis tools for your production data. You will struggle without them. You have two options for yield management analysis. You may decide to hire an engineer (or team of engineers) whose job is to transfer the data from datalogs to a spreadsheet, then generate reports. Or, you could invest in a system that takes c... » read more

Monte Carlo Analysis Using Synopsys Custom Design Platform


In this 5th video of the series, Kai Wang, Director of Engineering at Synopsys, explains the need of Monte Carlo to improve yield, and how designers use advanced features like variation scoping and sigma amplification to avoid costly MC simulations. Click here to watch this video white paper. » read more

Challenges At 3/2nm


David Fried, vice president of computational products at Lam Research, talks about issues at upcoming process nodes, the move to EUV lithography and nanosheet transistors, and how process variation can affect yield and device performance. » read more

Better Inspection, Higher Yield


Wafers can be inspected for large, obvious defects, or for small, subtle ones. The former is referred to as macro-inspection, while the latter is micro-inspection. These processes use different machines with different capital and operating costs, and they might look like competing approaches with different economic returns. In fact, they are complementary tactics that can be balanced within an ... » read more

Problems And Solutions In Analog Design


Advanced chip design is becoming a great equalizer for analog and digital at each new node. Analog IP has more digital circuitry, and digital designs are more susceptible to kinds of noise and signal disruption that have plagued analog designs for years. This is making the design, test and packaging of SoCs much more complicated. Analog components cause the most chip production test failures... » read more

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