Customizing IC Test To Improve Yield And Reliability


Testing the performance and power of semiconductors as they come off the production line is beginning to shift left in the fab, reversing a long-standing trend of assessing chips just prior to shipping. While this may sound straightforward, it's a difficult challenge which, if successful, will have broad implications for the entire design-through-manufacturing flow. Manufacturers typically g... » read more

Test Strategies In The Era Of Heterogeneous Integration


Moore’s Law, the observation that the number of transistors on an integrated circuit doubles approximately every two years, is critical to advances in computing technology. For decades, fabs have managed to achieve exponential growth in digital capability and transistor density by making transistors smaller and smaller, but we’ve hit the physical limits of these processes. Today, new proces... » read more

Addressing Copper Clad Laminate Processing Distortion Using Overlay Corrections


All great voyages must come to an end. Such is the case with our series on the challenges facing the manufacturing of advanced IC substrates (AICS), the glue holding the heterogeneous integration ship together. In our first blog, we examined how cumulative overlay drift from individual redistribution layers could significantly increase overall trace length, resulting in higher interconnect res... » read more

Smart Manufacturing Makes Gains In Chip Industry


Lights out manufacturing is gaining steam across the semiconductor industry, accelerating productivity, improving quality, and reducing costs and environment impact. These benefits are the result of years of strategic investments in technologies like machine-to-machine communication, data analytics, and robotics to achieve higher levels of autonomy. Semiconductor factories have long depen... » read more

Multivariate Analysis For Full Process Visibility


In semiconductor manufacturing, especially in electrical test data, but also in other parameters, there are often sets of parameters that are very highly correlated. Even a change in the correlation of those parameters may indicate a problem. For that reason, multivariate monitoring, or multivariate statistics, is applied to these parameters. Multivariate analysis, also known as multivariate... » read more

Challenges Grow For Creating Smaller Bumps For Flip Chips


New bump structures are being developed to enable higher interconnect densities in flip-chip packaging, but they are complex, expensive, and increasingly difficult to manufacture. For products with high pin counts, flip-chip [1] packages have long been a popular choice because they utilize the whole die area for interconnect. The technology has been in use since the 1970s, starting with IBM�... » read more

Managing Yield With EUV Lithography And Stochastics


Identifying issues that actually affect yield is becoming more critical and more difficult at advanced nodes, but there is progress. Although they are closely related, yield management and process control are not the same. Yield management seeks to maximize the number of functioning devices at the end of the line. Process control focuses on keeping each individual device layer within its des... » read more

Addressing Yield Challenges In Advanced IC Substrate (AICS) Packaging


No matter how you get your news, it seems like everyone is talking about AI – and it’s either going to usher in a new era of productivity or lead to the end of humankind itself. Regardless, the AI era is here, and it’s just beginning to have an impact on our lives, our jobs and our future. To meet the rigorous demands of AI – along with high-performance compute, 5G and electric vehic... » read more

Data Analytics For The Chiplet Era


This article is based on a paper presented at SEMICON Japan 2022. Moore’s Law has provided the semiconductor industry’s marching orders for device advancement over the past five decades. Chipmakers were successful in continually finding ways to shrink the transistor, which enabled fitting more circuits into a smaller space while keeping costs down. Today, however, Moore’s Law is slowin... » read more

Preventing Process Excursion With AI And Yield Management Software


Process excursion, or any deviation in a certain process, significantly impacts the cost of semiconductor manufacturing process and product yield. During production, process excursion can be detected early during in-line inspections. However, in some cases, excursion isn’t detected until later in the production process such as during wafer testing in the probing area after production. Apar... » read more

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