tag: yield

Beyond Optical: A New E-Beam Inspection For Advanced Chips
By Christophe Begue - 10 Feb, 2026 - Comments: 0

The semiconductor industry is defined by its relentless pursuit of smaller, faster, and more powerful chips. As we push into advanced 3D architectures like gate-all-around (GAA) transistors, a critical challenge emerges: finding the defects that kill yield. Many of these flaws are deeply buried within complex structures and impossible to see with traditional optical inspection. This creates ... » read more

Advanced Packaging Traceability And Root Cause Analysis
By Aftkhar Aslam - 20 Nov, 2025 - Comments: 0

The semiconductor industry is undergoing a profound transformation. What once centered on single-die silicon packaged in QFN or BGA formats has evolved into a landscape of multi-die integration, chiplets, 3D stacking, and photonics coupling. These advanced packaging architectures are redefining design, manufacturing, and test paradigms—enabling new levels of performance, efficiency, and funct... » read more

Ensuring Reliability Becomes Harder In Multi-Die Assemblies
By Gregory Haley - 29 Oct, 2025 - Comments: 0

Multi-die assemblies are bringing together a variety of materials and processes with distinctly different physical properties, creating significant challenges in manufacturing and packaging that can impact yield at time zero and reliability in the field. What passes electrical screening at the end of the line may look good on paper, but these devices can still fail once exposed to rapid and ... » read more

Using AI/ML To Find And Correlate IC Test Data
By Ed Sperling - 15 Oct, 2025 - Comments: 0

What causes low yield in wafers? Usually it's due to design or process changes, but sometimes yield issues occur even if there haven't been any changes from one manufacturing lot to the next. Finding the cause requires some sleuthing, and the best approach for pinpointing problems is to mine design, process, and manufacturing data, and to correlate that data by date and time, by which equipment... » read more

Metrology’s Growing Role In Reducing False Defects
By Gregory Haley - 14 Oct, 2025 - Comments: 0

When a good die fails test and gets scrapped, often no one notices, because false failures look identical to real ones. Yet across the industry, these phantom defects are quietly eroding yield, inflating test costs, and masking the true health of manufacturing processes. At advanced nodes and in heterogeneous packaging, where margins are already razor-thin, even minor variations in contact r... » read more

Correlation & Commonality Analysis In Complex Semiconductor Ecosystems
By Aftkhar Aslam - 18 Sep, 2025 - Comments: 0

The semiconductor industry is entering an era defined by heterogeneous integration and complex packaging technologies. Innovations such as wafer-on-wafer bonding, chiplets, multi-stacked die (2.5D/3D), bumping, and system-in-package architectures are enabling unprecedented performance and functionality. However, with these advances comes an explosion in manufacturing complexity and ecosy... » read more

Case Study: Production Yield And Throughput Improvement Using The Known Good Socket Analysis
By Jesse Ko - 09 Sep, 2025 - Comments: 0

The test sockets, which are crucial components that directly interface with semiconductor IC packages, have a profound impact on device testing performance. Pins with high CRES not only cause false failures in the test but also lower bin grading results, which in turn increase the manufacturing cost due to reduced production performance. The ever-increasing demand driven by high-performance com... » read more

Using AI For Fault Detection And Classification In Manufacturing
By Ed Sperling - 05 Sep, 2025 - Comments: 0

Third in a seven-part series: Classic fault detection and classification has some classic problems. It's reactive, time-consuming to set up, and any product change involves significant man-hours. Even then, it still misses a lot of problems, which result in scrap. This is where machine learning can excel, because it can sift through huge amounts of data from thousands of sensors and find outlie... » read more

Nanofabrication Protocol That Allows Patterning Metallic Electrodes on 2D Materials Reliably (KAUST, National University of Singapore)
By Technical Paper Link - 25 Aug, 2025 - Comments: 0

A new technical paper titled "High-yield photolithography protocol to pattern metallic electrodes on 2D materials without adhesive metallic layers" was published by researchers at KAUST and National University of Singapore. Abstract "When using two-dimensional (2D) materials to build electronic devices, adjacent metallic films need to be deposited to form electrodes. However, weak adhesion ... » read more

SLM: Actionable Silicon Insights Through Intelligent Measurement and Analysis
By Synopsys - 12 Aug, 2025 - Comments: 0

Developing semiconductors has always been a complex process, with advancements in electronic design automation (EDA) tools and fabrication technologies working to meet growing demands for larger designs, improved power efficiency, and better performance. As chip and system complexity increases alongside higher expectations for product reliability and longevity, traditional methods are reaching ... » read more

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