Extend the flexibility of the silicon by allowing specific regions to be reprogrammed with new functionality while applications continue to run in the remainder of the device.
As systems become more complex and designers are asked to do more with less, adaptability is a critical asset. While Xilinx FPGAs and SoCs always provided the flexibility to perform on-site device reprogramming, current constraints including increased cost, tighter board space, and power consumption demand even more efficient design strategies. Xilinx Dynamic Function eXchange (DFX) extends the inherent flexibility of the silicon by allowing specific regions to be reprogrammed with new functionality while applications continue to run in the remainder of the device. DFX addresses three fundamental challenges while enabling the designer to:
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Disaggregation and the wind-down of Moore’s Law have changed everything.
Different interconnect standards and packaging options being readied for mass chiplet adoption.
Continued expansion in new and existing markets points to massive and sustained growth.
Aging equipment and rising demand are pushing up prices and slowing production.
Experts at the Table: Designing for context, and geopolitical impacts on a global supply chain.
Interest in this particular ISA is expanding, but the growth of other open-source hardware is less certain.
Nanosheets are likeliest option throughout this decade, with CFETs and other exotic structures possible after that.
Hybrid bonding opens up whole new level of performance in packaging, but it’s not the only improvement.
Why this is becoming a bigger issue, and what can be done to mitigate the effects.
Some 300mm tools are converted to 200mm; equipment prices and chip manufacturing costs are rising.
From low resistance vias to buried power rails, it takes multiple strategies to usher in 2nm chips.
Manufacturing 3D structures will require atomic-level control of what’s removed and what stays on a wafer.
Disaggregation and the wind-down of Moore’s Law have changed everything.
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