The Changing Mask Landscape

Semiconductor photomasks have undergone some major technology changes in the past few years after relatively minor changes for many years. New technologies such as multi-beam mask writers and extreme ultraviolet (EUV) lithography are major breakthroughs as they ramp into high-volume manufacturing. A new trend related to these technologies is the use of curvilinear features on photomasks.

Aki Fujimura, CEO of D2S, speaks to Mike Hermes, Vice President of Mask Technology Operations at Micron, about the changing mask landscape.

Aki Fujimura: Mike, you’re celebrating 38 years at Micron this year – congratulations! You started out as a yield engineer and now you’re the VP of Mask Technology Operations. That’s quite a career. What have been some of the highlights?

Mike Hermes: Thanks Aki, I’m relatively new to the mask side of the business. My first 33 years at Micron were on the wafer fab side. When I started in 1984, Micron had been manufacturing DRAM for 3 years with around 600 employees at single location in Boise. Now Micron is a global company with more than 40,000 employees and $28B in revenue last year. Micron’s main products are NAND and DRAM memory where the total market is greater than $160B. The semiconductor memory business has been a roller coaster. In the 80s when I started, Micron was a pure DRAM manufacturer. At the time, I think there were 18 DRAM manufacturers in the US. Today, Micron is the only US based DRAM maker left. In the 90s, Japanese companies dominated DRAM with their manufacturing prowess. During this time, I think there were roughly 10 Japanese DRAM manufacturers. Not a single Japanese based DRAM manufacturer remains today. In the new millennium Korean memory companies emerged as major players. A new major memory type emerged as well – NAND.

You’re probably asking yourself why were there so many memory maker start-ups that ended up exiting the business. A big factor over the years was the huge swing in supply and demand. For the first 30 years or so, memory would hit the bottom of the cycle about every 7 years, and there would be casualties. The last 10 years have been more stable. The main DRAM players have been constant. Micron, Samsung, and Hynix have about 90% of the market share. On the NAND side, we have the same three, plus three others: Intel, WD, and Kioxia, who was spun out of Toshiba a few years ago. As we look forward, the wildcard is China. Will its entry into memory in the next several years upset the supply and demand balance?

In terms of personal highlights, joining the mask team about 5 years ago is one. I’m lucky to be surrounded by some fantastic, experienced mask experts who continuously educate me. Before that, I was fortunate enough to work in some pretty diverse parts of the business such as wafer yield, R&D

pilot fab management, and process integration for an emerging memory technology. I once even led the startup activity inside Micron for LED manufacturing operations.

Fujimura: Speaking about your mask operations, it’s a big job to run one mask shop, but you have two mask shops now. What’s the reason for two? Does it have anything to do with EUV?

Hermes: To keep up with the leading-edge technology on the wafer side of the business you need to invest in leading-edge mask tools. A few years back we were in a position where we needed to bring in leading-edge mask tools, but we were out of clean room space. Rather than displace older tools with new ones, we elected to keep the legacy tools and built a second mask fab so we could accommodate the newer tools. Doing this enabled Micron to bring all its mask making inhouse, which also enabled us to have more control over mask costs. With respect to your second question, EUV and optical share a lot of the same process tools, but EUV has specialized tools especially in the inspection and print validation areas. The bottom line is we run EUV and optical in both our mask fabs. Both fabs are on the Boise campus so sometimes masks will move between the fabs for processing. A win I’d like to highlight is how we’ve overcome logistical challenges and perform as “one” team across the two mask fabs.

Fujimura: Staying on the EUV topic, it seems like a good time for Micron to be entering with pellicles and actinic inspection barriers removed but what are some of the remaining challenges EUV poses for the mask shop?

Hermes: Micron has a history of looking to hit the timing “sweet spot” when it comes to new technology, especially when there is huge capital expense. So, we’ve waited for some technologies to mature a bit before committing. A good example is the adoption of 193nm lithography where we were able to extend 248nm lithography longer than our competitors with high-transmission masks, a novel technology at the time. Micron was also a pioneer in pitch multiplication. Our expertise in this area is one reason we’ve been able to delay the transition to EUV. With regards to EUV pellicles and EUV actinic barriers being removed, I still see issues with both. Both incur very high costs. EUV pellicles are not only costly, but they have short lifetimes, and they significantly reduce the throughput of the most expensive tool in the wafer fab – the EUV scanner.

Fujimura: Are you preparing for curvilinear shapes on EUV masks? You’re going into EUV prior to high-NA, right? You would think there are even more reasons to consider curvilinear shapes, so how’s it going at Micron?

Hermes: Micron has previously stated that curvilinear masks are a path to increase process margin and manufacturability in the context of immersion lithography. It is natural that these methodologies will cascade to EUV lithography as well. Whether it’s assist features, curvilinear, or whatever…you are still going to use all the tools in your toolbox to get the most process margin possible. The infrastructure to support curvilinear masks will be more mature by the time high-NA EUV becomes available, so maybe that’s the intercept point for broader adoption. In the meantime, curvilinear continues to evolve and Micron will continue to develop and process curvilinear shapes. But today it is very resource intensive.

Fujimura: According to the annual eBeam Initiative Luminaries survey, EUV is one of but not the only reason to invest in multi-beam mask writers (MBMW), as shown in figure 1. As you’re not yet using EUV in production, what are the reasons to invest in MBMW now?

Hermes: Multi-beam writers enable higher quality reticles from a local critical dimension uniformity (CDU) and registration standpoint. You are going to want this whether it’s on EUV or optical. The multi-beam writer reduces the mask contribution to placement error on the wafer. This is important because over time, the overlay tolerances have continued to shrink and become more critical.

Micron has been developing EUV technology for many years, but past masks did not have the ultra-high figure densities. Some EUV layers on today’s nodes will have the higher figure density which would create multiple days or weeks on an e-beam variable shape beam (VSB). For those masks, the MBMW is a necessity.

Fig. 1: Primary reasons for purchasing multi-beam mask writers according to 2021 Luminaries Survey Source: eBeam Initiative

Fujimura: Micron is a leader in the industry in adopting curvilinear mask shapes for production use. Curvilinear is kind of the talk of the town right now. What can you tell us about the hidden barriers for other people adopting curvilinear mask shapes?

Hermes: I think in general, the industry infrastructure to support the application of curvilinear is still immature. Users are still trying to figure out where OPC, MPC, e-beam writer, and inspection tools formats will eventually land to ensure efficient interoperability across tools and technologies. There are multiple efforts in the area with the extended OASIS format, MBF 2.0 file format, and other proposals from EDA companies. I’m encouraged to see than an industry working group is close to submitting a curvilinear format to the SEMI industry association.

Also, full-field curvilinear processing is very intensive today and needs very costly computing power to achieve the desired throughput. We definitely see opportunities for innovation in this space. What we see today is that given the complications of deploying a curvilinear solution, its application is restricted to areas of the mask or layers with high pattern repetition where applying curvilinear solutions provide a high ROI that justifies the complexity brought by these types of masks. This is a great opportunity for the industry to work together, bringing customers, vendors, and competitors together to advance the state of the art. I’m happy to help the eBeam Initiative bring everyone together to make things happen and to promote the results.

Fujimura: The world is much more aware of the importance of semiconductors today and it’s an exciting time to be the head of one of the leading-edge mask operations. How do you feel about the future of the mask industry?

Hermes: Working on the leading edge of mask technology with things like multi-beam writing, actinic inspection, and curvilinear is extremely exciting. Photomask development is a key enabler in achieving the technology advancements that are needed on wafer. Because of that, we always must be thinking ahead of the curve and anticipating the needs that will come with each shrink or new light
wavelength. As we see the demand and need for semiconductors grow in the “data economy,” we at the mask shop will have a huge hand in keeping up with those demands through innovation and collaboration with our wafer fab partners.

Fujimura: Thank you very much for your insights.