The Ins And Outs Of Directed Self-Assembly

By Mark LaPedus
H.S. Phillip Wong, professor of electrical engineering at Stanford University and one of the leading experts on directed self-assembly (DSA) technology, sat down to discuss the future of this approach with Semiconductor Manufacturing & Design. With funding from the Semiconductor Research Corp. (SRC), Stanford is exploring contact-hole patterning and the design infrastructure using DSA. The research is also funded by the National Science Foundation (NSF).

SMD: What is DSA and how does it work?
Wong: Let me take a simple but appropriate analogy. If you have a cup of water and drop some oil in it, the oil will form droplets by itself. It’s self-assembled that way. The physical driving force for self-assembly is that the surface forces for the oil and water are different. They have different surface tensions. So therefore, they separate out by themselves.
Another example is if you had a tray of marbles. When you tilt the tray, the marbles will fall down. If you shake it a little bit, they will closely pack into a hexagonal type of arrangement. If they end up in the wrong place, they can get out of the wrong place and find a lower energy state. DSA is the same thing. Block copolymers have a natural driving force for them to come together or separate because of surface energy. We provide some shaking, or high-temperature annealing at 100 degrees C or 180 degrees C, to allow polymers to find their low energy spot. These different blocks have different surface energies that drive them to be what we call phase separated.

SMD: The DSA flow is rather simple, but is it an expensive process?
Wong: It’s not that expensive from a tool or materials point of view. This is what a DSA process is like. Basically, you pattern a template using conventional lithography. You mix the co-polymer in a solvent. You spin coat them. And then you heat them a little bit to allow the solvent to move or go away, while at the same time providing some energy for the polymer to find its lowest energy position. That’s when the self-assembly occurs.

SMD: What are the physical limits for DSA and what is the insertion point for IC production?
Wong: DSA enables people to build devices at smaller features sizes and tighter pitches. It continues density scaling. The industry has a way to see it at 14nm or further. Material science people have shown 6nm half-pitch. But academics are very poor predictors of technology insertion points. So I am not going to make any predictions about that.

SMD: What is the status of DSA in the IC industry right now?
Wong: I think we’re in the pre-development stage. Companies are looking at whether to put a development effort in it. But a lot of interesting things are happening in both academic research as well as in various companies. Companies, including the device manufacturers, materials suppliers, resist companies and the tool vendors, are keeping an eye on it. We won’t know the real status until we get to the point where people actually put in a development effort to do it. That’s when the hot problems come up.

SMD: Has anyone made a commitment to go into production?
Wong: I am not aware of it right now. Like I said, it’s in the pre-development stage. When you say commitment, that means companies are putting in a development effort. I don’t think that’s happening yet. I think it will eventually happen.

SMD: Is DSA a next-generation lithography (NGL) technology that will replace current litho tools?
Wong: This is more of a complementary technology than a dislocating technology. I don’t think it will replace anything. Just like when double patterning came along, it didn’t replace anything. DSA allows you to go further with tools you already have. I view this as analogous to the arrival of double patterning. It’s a technology that allows you to extend your tools a little bit longer.

SMD: Can you use DSA with EUV?
Wong: We have EUV-based printed guiding templates. The templates are kind of small; they are 60nm or so. To me, EUV is just a way to print the guiding templates. DSA doesn’t replace EUV. You can’t junk litho tools in DSA. You still need them.

SMD: What will DSA enable in IC production?
Wong: Different people are looking at different things. I am working on the contact holes. For lines, you may have other options like double patterning. For holes, you don’t have other options. They are becoming harder to print. The pitch is too small. In optical lithography, sometimes you have two holes and a little bridge that bridges the two. That becomes a defect. DSA is going to help with the pitch problem. DSA can also heal some of the printing defects, because the polymers are kind of soft and malleable. For example, you have a printing defect, say two holes merged together. After DSA, your two holes will become separated. The stuff in the bridge area will be filled in with DSA material. They heal the defects that way.

SMD: What are the major challenges to put DSA in IC production?
Wong: Defectivity and design. Defectivity requirements are very high. For example, in the SPIE paper that Chris Bencher (of Applied Materials) gave a couple of months ago, he showed that defectivity was about one in maybe several million or tens of millions for contact holes. But there are billions of contact holes in a chip. So right now, we are several orders of magnitude off. I don’t think it’s an insurmountable problem, because when most things were introduced in the beginning, defects were high. We just have to learn how to get the defects out of there.

SMD: What have you demonstrated in R&D?
Wong: In the experimental work we have done, we’re using a kind of block copolymer that give us holes of the order of 15nm or 20nm in size, with a pitch of anywhere from 20nm to 40nm full-pitch. We’re not really focusing on pushing the sizes and pitches. We’re focusing on understanding the design requirements. All of these things have to be transparent to the circuit designers.

SMD: You have talked about a DSA design environment using an alphabet soup of characters. How does that work?
Wong: You have these DSA patterns, which are guided by guiding templates. The guiding templates are printed by conventional lithography. From the circuit designer point of view, all they care about is where the contact holes are eventually. So, for example, you would have a guiding template that surrounds a group of contact holes. (A given template would denote) an L-shape, T-shape, a pair or a triplet. So, this is the DSA alphabet I’m referring to. In other words, you would look at a design and say: ‘This design is composed of a pair, triplet, L-shape, T-shape or whatever.’ You basically classify your layout into these groups just like having 26 letters of the alphabet.

SMD: How many letters do you envision in a DSA design environment?
Wong: This is an interesting research question. How big is the alphabet set? Do you need 26 letters of the alphabet or will five be adequate? Maybe two. Maybe 100. We are only looking at a handful right now. We’ve used it to compose SRAM cells and various random logic circuits in standard cell libraries. We’ve demonstrated a standard cell library and shrunk it down to 22nm.

SMD: Will this force designers to use restrictive design rules?
Wong: You probably would them—not very restrictive design rules, but somewhat restricted. People are used to that these days.

SMD: What’s the next milestone?
Wong: To look at more of the letters of the alphabet and see how many more are required. Of course, the smaller number the better. Otherwise, you will have a tough time characterizing them. Try and learn a language with 100 letters of the alphabet. It’s hard to do.

SMD: How do you make this into commercial EDA tools?
Wong: Eventually, various pieces of the industry will come together. Even if they don’t come together, they will have their own way of doing the DSA alphabets. And then, you will have Synopsys telling their customers: ‘We have a better alphabet than Cadence. So come use our tools. Cadence will do the same thing.’

SMD: Are the EDA companies behind the curve in DSA?
Wong: I don’t know what’s going on behind closed doors. Right now, I think they realize this could be a business opportunity. This could also spawn some new EDA companies, which eventually may get acquired by the bigger ones.