The Week In Review: Design

M&A
Synopsys acquired PhoeniX Software, expanding its photonic integrated circuit design range. Founded in 2003 and based in the Netherlands, PheoniX adds photonic aware physical layout capabilities, enabled by support for foundry-specific PDKs, along with a full photonic chip design package. Terms of the deal were not disclosed.

Siemens PLM Software will acquire Sarokal Test Systems, which provides test solutions for fronthaul networks, the links between centralized radio controllers and the edge of a cellular network. The technology is specifically designed to detect RF problems and will be integrated with Mentor’s Veloce emulation platform for validation of 4G and 5G designs. The Finnish company was founded in 2013 when it was spun off from Sarokal Solutions, which developed the first generation product in 2009. The deal is expected to close in the first quarter of 2018. Terms were not disclosed.

Broadcom upped the amount it’s willing to pay for Qualcomm to $121 billion, or $82.00 per share. The offer previously stood at $70 per share, regardless of whether Qualcomm’s acquisition of NXP is approved. Qualcomm’s board denied the offer.

Tools & IP
Aldec added a Unit Lint function to its Active-HDL 10.5 FPGA design creation and simulation tool, allowing users to check a block of HDL code in the background. Checks include: the identification of incomplete and/or redundant combinational and sequential process logic, condition statements and unintended latches; confirmation of FSM coding correctness; basic X propagation checks; data conversion coding errors; and flagging of suboptimal synthesizable code.

Aldec also paired two of its embedded development products, the TySOM-2A-7Z030 embedded development board and an FMC-NET daughter card, as a networking solution for high traffic, reprogrammable data routers and switches. It provides two Wi-Fi/Bluetooth channels, six Ethernet connectors, one QSFP+ connector, four SATA connectors, and four USB connectors.

SoC-e released an IP core based on IEC 61850/62351 to secure the strict real-time traffic used in Substation Automation Systems and in new Smart Grid premises to communicate to critical equipment, as well as a low-latency cryptographic cipher.

Standards
MIPI UniPro v1.8 has been released. The transport layer specification is used to interconnect chipsets and peripheral components in mobile-connected devices, with the latest version providing higher data speeds compared to the previous release and incorporates techniques that ensure the quality of high-throughput transmissions. The release operates on MIPI M-PHY v4.1. JEDEC adopted the specification to provide the interconnection layer for Universal Flash Storage (UFS) version 3.0 memory components.

Deals
NetSpeed is working with both Cadence and Synopsys in a push for automotive SoCs. Cadence’s Interconnect Validator and Interconnect Workbench can now provide functional coverage and a cycle-accurate performance analysis for NetSpeed IP cache coherency features. Meanwhile, generated RTL of NetSpeed’s interconnect IP can now be imported into Synopsys’ Platform Architect virtual prototyping environment for architecture analysis.

Breker Verification Systems joined the ESD Alliance. The company provides Portable Stimulus solutions, the emerging standard to for specifying verification intent and behaviors reusable across target platforms.