The Week In Review: Design

Place-and-route tool update; formal VIP; communications DSP; Ansys’ results.



ARM made two acquisitions to add the new NarrowBand-IoT (NB-IoT) low power wide area connectivity standard to its designs: Mistbase, founded in 2015 in Sweden, provides a complete NB-IoT physical layer implementation solution, while London-based NextG-Com, founded in 2008, offers a complete layer two and three software stack for NB-IoT.


Synopsys released the latest version of its place-and-route system, adding automatic placement-clustering, advanced logic structuring, analytical clock-and-data optimization and new algorithms for power optimization. According to the company, the update provides 5% better timing, 5% smaller area and 20% power savings.

Mentor Graphics’ software tool for requirements management and tracking was qualified for use in safety-critical ISO 26262 designs and verification flows at all criticality levels up to and including ASIL D.


Oski Technology is moving into verification IP with the launch of its Formal Verification IP Library for ARM AMBA interface protocols. VIP library components are available for both interface protocol rules and coherency properties for all revisions of the ARM CHI and AXI Coherency Extension (ACE) standards. According to the company, it is compatible with a variety formal verification, simulation and emulation tools.

CEVA debuted a new communications DSP for 5G, gigabit LTE, MU-MIMO Wi-Fi and other multi-gigabit class modems. It adds a new micro-architecture, specialized instructions to boost all baseband processing components, and new core streaming interfaces. According to the company the DSP, CEVA-XC12, capable of operating at 1.8 GHz in 10nm and consumes 50% less power than its predecessor.


Goke Microelectronics licensed Sonics’ SonicsGN NoC along with the MemMax memory scheduler IP. Goke will use the IP in development of an SoC platform targeted for set top box designs.

CommSolid’s latest baseband solution, supporting the NarrowBand IoT (NB-IoT) standard, integrated Cadence’s Tensilica Fusion F1 DSP to run an ultra-low-power modem plus smart IoT applications such as voice trigger, audio identification and sensor fusion.

Methods2Business incorporated Cadence’s Tensilica Fusion F1 DSP in its scalable Wi-Fi HaLow MAC IP offering. The IP targets SoCs designed for battery-powered sensor nodes used in smart home, smart city and industrial applications. The DSP is used to implement the IEEE 802.11ah MAC firmware and to run value-added applications like voice trigger, audio identification and sensor fusion.

Andes Technology won a deal with Cyberon, who used Andes processor cores to power its technology for always-on mobile and IoT devices which listens to ambient speech to detect and respond to triggers.


DVCon is coming up next week, Feb. 27 – March 2 at the DoubleTree Hotel in San Jose, CA.

eSilicon, Rambus, and Samsung Foundry will host a seminar discussing HBM technology, high-speed SerDes, 2.5D integration, high-performance ASIC design, interposer/package design and the manufacturing and packaging technologies for FinFET-based designs. The event is March 8 from 4:00pm to 7:00pm at Samsung’s San Jose location. Registration closes March 3.


Ansys released financial results for the fourth quarter of 2016 with revenue of $270.6 million, up 8% from the same quarter last year. On a GAAP basis, earnings per share stood at $0.80 in Q4, up 7% from $0.75 in Q4 2015. Non-GAAP earnings for Q4 were $0.98 per share, up 8% from $0.91 for the same quarter in 2015. For the whole of 2016, revenue was $988.5 million, up 5% from 2015. The year’s GAAP earnings per share were $2.99, up 8% from $2.76 in 2015, while non-GAAP earnings were $3.63 per share, up 6% from $3.42 last year. Ansys CFO Maria Shields noted that the company is planning a workforce restructuring for 2017. The company expects revenue in the range of $237.0 – $246.0 million for Q1 2017.

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