Using Data More Effectively In Chip Manufacturing

Feed-forward and feed-back become essential as the cost of chips rises, but making this all work will take time.


Experts at the Table: Semiconductor Engineering sat down to discuss smart manufacturing and how tools and AI can enable it for semiconductors, with Mujtaba Hamid, general manager for product management for secure cloud environments at Microsoft; Vijaykishan Narayanan, vice president and general manager of India engineering and operations at proteanTecs; KT Moore, vice president of corporate marketing at Cadence; and Mohit Gupta, senior vice president and general manager of Alphawave Semi. What follows are excerpts of that discussion, which was held in front of a live audience at the recent Design Automation Conference. To view part two of this discussion, click here.

[L to R] Ed Sperling, Semiconductor Engineering; Vijay Narayanan, proteanTecs; Mohit Gupta, Alphawave Semi; KT Moore, Cadence; Mujtaba Hamid, Microsoft.

SE: We’ve been talking about Industry 4.0, otherwise known as smart manufacturing, for years. Where are we today? And where does the chip industry stack up?

Narayanan: It’s been a buzzword for a long time, but right now we’re seeing the fruits of that with real solutions. That will enable companies to take on improved PERCS — productivity, efficiency, reliability, cost, and scalability.

Gupta: Over the last few years, and especially post-pandemic, the world came to the realization just how important semiconductors are. A tiny chip missing from a car or a refrigerator couldn’t get you there. The importance has gone up. But that also puts the onus on us. With the advent of all this growth in data, how do you sustain it? And how can we make sure there are good systems out there that can deliver on this?

Moore: This whole movement to Industry 4.0 is largely being driven by injecting intelligence into our processes. We spent the last few decades focusing on automation and scalable performance. To extend that by being able to include artificial intelligence or machine learning in the processes, whether it’s design or manufacturing — it’s here. We’re learning and developing, and partnering with our customers to do a better job.

Hamid: We’ve been wanting to do higher-fidelity design and better-quality manufacturing in the supply chain for a long time. What’s coming together is a confluence of enabling factors. With cloud and large data modeling tools, you can do much higher-fidelity simulations of your design before you send it off to manufacturing. You’ve got things like cloud at the edge, which allows predictive maintenance and automation, and a lot better data sharing for supply chain resiliency. Digital twins also are in use. So a lot of the enabling technologies are coming. Even though the industrial Metaverse is going through something like the Gartner trough, it will come through and allow more richer visualizations. And now the AI wave is coming in. All of these technologies really can improve the digital engineering cycle, so to say, which will help semiconductors and other physical systems, as well.

SE: Whenever we talk about smart manufacturing, people often point to semiconductors as the industry at the leading edge. But there are some holes here? What are they?

Narayanan: People work in silos. There is a testing team, a production team, and an in-field team for a design. But there is no common platform for feed-forward or feed-back on data, where you can improve your efficiency or your productivity. You learn from your mistakes, and you feed that learning back to your design so that you improve the quality of it. And that’s a big part of automation and making decisions based on some of the learnings you’re getting from the chip. You’re automating the different stages of a common platform. Breaking apart silos is the first step.

SE: Can you define what you mean by a common platform?

Narayanan: We have these agents that are added inside a chip to gain visibility into that chip. Once the silicon comes out, we get readouts from that. We have a platform where that data is loaded in at the system-level stage, at production, and in field. So now anyone who’s going to that platform has visibility across these fields. If there are issues, they raise flags, and that data can be fed backward or forward to fix those issues or take other actions.

Hamid: From the software industry side, we have this continuous loop for development and operations. That loop relies on common data. We call it data substrate software. It may be a loaded term, but we need that type of data substrate to be able to do look ahead and look back and have a continuous loop for design and manufacturing.

Gupta: There’s another vector to this. As these systems get more complex, the cost of re-spins and of making a mistake have become tremendously high. Both feed-forward and feed-backward are like continuous improvement across your flows. An RTL engineer needs to know what happens in the silicon. When you build something in a company, you need to stay there until you see the silicon. Otherwise, the loop is not closed. If the design team moves on, you leave a lot behind. And now the stakes are much higher. You take any leading process node with complex heterogeneous chips or chiplets, and the cost of building these systems is much higher.

Moore: There are two vectors stemming from these silos. Our customers have been designing these complex chips, systems, or boards, using a sequential process. But as these things become more complicated and more integrated, we have to be able to remove these artificial boundary conditions in the design process. Second, some of our customers and not just designing chips anymore. We have customers that design chips to build systems. We have systems companies now building chips. So the whole integration layer is expanding exponentially, and we have to be able to account for that.

SE: That continuous loop is no longer just in the manufacturing or back into the design. Now it has to go forward into the field and come back, as well. But how do you align all those pieces? There are multiple products that are coming out pretty fast, and some of those have longer lifetimes. How does that data actually feed-back?

Hamid: The design flow has to evolve, as well. The design flow hasn’t fundamentally changed over the last several decades. New tools and sophistication have come in. But if you look at truly being able to feed forward/feed backward — if AI comes, and if you change the boundaries between what gets designed in the core chip versus off-chip accelerators, and what gets done in systems, boards, or software — that boundary fluxes. How do you stay agile with a traditional design flow? That’s where this data platform is so critical. And the data platform both needs to enable feed-back and feed-forward through the design, and also into manufacturing and into the field. If the data platform is more aligned and you’re able to get the telemetry data back in real-time, the designers can react more quickly. That whole thing needs to be shaped up.

Narayanan: I agree with you. We are not there yet, but we are on the right track. We have taken some steps already, but there is still more to do.

SE: What do these data platforms look like?

Moore: From a product creation point of view, the data platform needs to expand to all aspects of the design. When I graduated from college, my main responsibility as a chip designer was to make sure the chip met the performance metrics, and that was about it. We didn’t care about power or area as much. But as you add these other dimensions to the design, you need a platform that can extend from the RTL creation all the way through to sign-off, and be able to access all these different data points. And now we’re talking about not just designing a chip, but doing it in context. It’s not just electrical behavior. It’s also physical behavior, physical interactions — thermal, and things like that. We used to talk about concurrent design and correct by construction. But now you’ve got an exponentially increasing number of variables to look at while you’re doing these designs, and this is where AI is going to reshape how we can explore the design space.

Gupta: I’ll give you one example of how you can take something which is at a macro level. Our company works in the field of connectivity, and there are all these massive data centers around the world. If you look at their CapEx, it’s dominated by electricity for cooling. Hardware is a smaller component. So the person who’s designing a chip or a solution that goes in there can take a picture of the power a data center consumes, drill down to the rack, and from the rack to a server and to a chip, and so on. Maybe we’re not fully there, but there’s a lot more feed-back happening, like what it means at the system level. And some of these parameters, like power, never used to be a key concern, except for battery-powered devices. But now many systems won’t take off if you cannot meet the power budget. A lot of that perspective has come down to chip engineers from a macro level.

Hamid: And the puck keeps moving. As we head toward a trillion transistors on a chip, and chiplets and 3D stacking, there are all these permutations and combinations the designer has to factor in. And then, change is possible during the flow. So you can’t go in with a mindset like, ‘This is the chip boundary and I’m working toward a predictable outcome.’ You are working toward a fluid outcome, which makes the data platform you’re using loosely even more important.

Gupta: There are many ways you can solve a problem in a chip, and not all of it has to be done at the chip level. You can solve certain things as part of the chip, but you also may be able to fix it in software. There are enough investigation capabilities nowadays that are available through the hardware/software co-design approach, where you can optimize things from a system perspective to get the best out of both worlds.

View part two of this discussion: Need To Share Data Widens In IC Manufacturing.

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