Virtual Prototyping In SoC Development

Modern semiconductor technologies enable manufacturers to pack more and more functions and memory into a single silicon die. While steadily advancing microintegration based on Moore’s Law just a few years ago mainly focused on increasing the clock frequency of integrated circuits (IC), today, it’s the design complexity and number of blocks that enable new IC functions. More and more logic blocks, processor cores, accelerators, and memory — in what is referred to as a system on a chip (SoC) — allow embedded systems to do more than what may have seemed possible not too long ago.

Beyond that, there are advanced packaging technologies, such as chiplets, which can be placed very close together thanks to the different ICs, in order to perform their complex task together. The advantages offered by very dense integration can be put to use in a wide range of applications. Besides ubiquitous devices such as smartphones and wearables, applications in the automotive (e.g., autonomous driving), avionics (e.g., unmanned aerial vehicles), industrial (e.g., human-robot collaboration) and medical engineering (e.g., computer tomography) sectors require the high performance of a highly integrated SoC. Behind the need for state-of-the-art microtechnology are the extremely high data rates, low latency, high reliability and comparably low power consumption.

But the price of these benefits is a complexity in the development and verification of SoCs that may become excessively expensive — especially when it comes to safety-critical systems such as automotive applications, where malfunctions can have fatal consequences. While in many disciplines of engineering the construction of a mechanical prototype enables testing and optimization of the system, this isn’t as easy with SoCs, as the processing times within a semiconductor fab can amount to several months. Aside from the long time-to-market, the associated costs for a silicon prototype are hardly feasible.

Virtual prototyping not only offers huge advantages in terms of time and costs, but is often the only solution for early system testing. One impressive example is the development of ECUs for autonomous driving, where several millions, or in some cases billions, of road miles are required to optimally fine-tune the system software and hardware. Both virtual environment models and virtual hardware prototypes have to be employed.

In addition to early performance and architecture optimization, virtual prototypes also enable a shift left of the entire verification and validation process. As a result, firmware and application software tests can be carried out much earlier and parallel to hardware development. In the future, fast, virtual product releases will move many other process steps up that were previously only possible once product development was completed.

But the use of virtual prototypes to speed up the development process requires an investment into a model-driven development approach, as well as in virtual prototype IPs (VP-IP), for example, based on SystemC/SystemC AMS. As a clear trend toward model-driven system development can be observed, and VP-IP is playing an ever more important role. In the future, we will see a growing offering on the market. This is why it’s worthwhile to integrate virtual prototyping models in SystemC into a company’s development flows now in order to significantly accelerate tomorrow’s development processes of the upcoming product generation.