Week In Review: Design, Low Power

Siemens will acquire Supplyframe, a supply chain intelligence, sourcing, and marketplace platform for the electronics industry, for $700 million. The company operates on a software-as-a-service model and will serve as the nucleus of Siemens’ digital marketplace strategy, according to Cedrik Neike, member of the Managing Board of Siemens AG. “Supplyframe’s ecosystem and marketplace intelligence complements our industrial software portfolio perfectly and strengthens our capabilities for the growing market of small- and mid-size customers.”

The company’s focus on connecting the extended electronics value chain ” has been further accelerated by the recent component shortage environment, which has exposed the fragility of supply chains and created a mandate for digital transformation and intelligent decision making,” said Steve Flagg, CEO and founder of Supplyframe. Founded in 2003, Supplyframe is headquartered in Pasadena, Calif. The deal is expected to close in the fourth quarter of FY 2021.

Ansys acquired Phoenix Integration, a provider of software that enables creation and automation of multi-tool workflows for model-based engineering (MBE) and model-based systems engineering (MBSE). Ansys said the acquisition will complement its prior Dynardo and Analytical Graphics, Inc. acquisitions, enabling users to connect a range of engineering tools together. “Phoenix Integration has seen firsthand the benefits that engineering simulation and MBE have in transforming the product development process,” said Jane Trenaman, president and CEO of Phoenix Integration. “We are looking forward to joining forces with Ansys to help our existing customers benefit from expanded access to physics-based simulation within their model-based engineering workflows, and we are excited to see the ModelCenter platform provide increased value to the Ansys community.” Based in Blacksburg, Va., Phoenix Integration was founded in 1995.

Tools
Cadence unveiled the Spectre FX Simulator, a next-generation FastSPICE circuit simulator for verification of memory and large-scale SoC designs. It is scalable up to 32 cores with multi-threading to parallelize transient simulations and includes static and dynamic circuit checking, alters, sweeps, and Monte Carlo analyses, as well as functionality, timing, and power checks for full-chip and subsystem-level designs. It is integrated into the Virtuoso ADE Product Suite. MediaTek and Renesas noted using the new tool, and JVCKENWOOD said it is adopting the new simulator along with other Cadence platforms for development of its consumer electronics.

Aldec released the latest version of its Riviera-PRO verification tool, adding support for Interfaces in VHDL-2019, which allows users to create code that is more compact and more reusable. Other new features for VHDL-2019 simulation include support for arrays and records of the file type, the introduction of sequential block statements, and the STD library, which has been enhanced with the REFLECTION package. SystemVerilog simulation enhancements now allow the data type of a user-defined nettype to be specified with a type parameter, and randomsequence statements to be declared in modules and classes parameterized by a type.

Synopsys reported financial results for the second quarter of 2021 with revenue of $1,024.3 million, up 18.9% from $861.3 million in Q2 2020. On a GAAP basis, earnings per share were $1.24, up 74.7% from $0.71 per share in the same quarter last year. Non-GAAP earnings for Q2 2021 were $1.70 per share, up 39.3% from $1.22 per share in Q2 2020. The company is raising its fiscal 2021 revenue, non-GAAP earnings and operating margin, and operating cash flow targets.

IP
Avery Design Systems and Rambus are extending their long-term memory model and PCIe VIP collaboration. Rambus uses Avery’s memory models to verify a range of controllers and also includes them in customer deliveries for out-of-the-box simulations.

SEMIFIVE inked a deal with Arm for access to a broad range of Arm IP, including Cortex-A, Cortex-R and Cortex-M CPUs, Mali GPUs, Ethos NPUs, as well as various system and subsystem IP for use in its platform SoC solution and ASIC design services.

Efabless is launching a new program called chipIgnite to provide low-cost manufacturing of designs based on a full chip reference design template that implements the physical IO for the chip. It includes a development board and firmware stack to simplify design validation and test and an optional open source design flow for generating layout from FTL. The first node supported in the program is SkyWater Technology’s open source SKY130 (130nm) process. It supports private commercial designs that include non-open source IP.

Memory
Unisantis announced its Dynamic Flash Memory (DFM) technology, which it is positioning as an alternative to DRAM, with faster speeds and higher density. DFM is a volatile memory based on the company’s 3D surround gate transistor (SGT) technology that doesn’t rely on capacitors, which the company said allows for fewer leak paths. Unisantis also said DFM does not involve adding additional materials on top of a standard CMOS process.

After a drop in 2019, strong DRAM pricing is expected to help bring total memory revenue up 23% this year to $155.2 billion, according to market research firm IC Insights. Memory sales are expected to continue gaining next year, with sales projected to rise 16% to $180.4 billion.

AI
STMicroelectronics acquired the assets of Cartesiam, a company that specializes in AI development tools for inferencing on Arm-based microcontrollers. The company’s product is complementary to STMicroelectronics’ existing solutions, said Claude Dardanne, President, Microcontrollers and Digital ICs Group, at STMicroelectronics: “With STM32Cube.AI, STMicroelectronics already offers the ability to map and run pre-trained artificial neural networks on our broad portfolio of STM32 microcontrollers. The addition of Cartesiam’s machine learning technology to STMicroelectronics’ existing solutions will provide the best edge-AI solution portfolio on the market for any customer looking to bring additional innovation to their offering.” Based in Toulon, France, Cartesiam was founded in 2016. Terms of the deal were not disclosed.

Google announced the newest version of its Tensor Processing Unit, TPU v4. The latest version of the AI and machine learning-focused chips doubles the performance of the previous TPU v3, said Google CEO Sundar Pichai, and when combined into a ‘pod’ of multiple TPUs can deliver more than one exaflops of floating point performance. Pichai explained, “TPUs are connected together into supercomputers, called pods. A single v4 pod contains 4,096 v4 chips, and each pod has 10x the interconnect bandwidth per chip at scale, compared to any other networking technology.” The new TPU v4 infrastructure will be available to Google Cloud customers later this year.

Infineon released ModusToolbox Machine Learning, a feature that enables deep learning-based workloads on Infineon’s PSoC MCUs. Targeting AIoT devices, it provides middleware, software libraries, and special tools to optimize the ML model for embedded platforms to reduce size and complexity, as well as validate performance against test data. It integrates with existing frameworks available in ModusToolbox.

Quantum computing
Ireland is launching the country’s first quantum computing research center. The multi-million-euro investment will help fund 900 square meters of research space at the Tyndall National Institute as well as 45 quantum research jobs. Part of the goal of the center is to connect academia and industry and develop a workforce with skills in quantum technologies.

Google also announced its new Quantum AI campus that will include a quantum data center, quantum hardware research laboratories, and quantum processor chip fabrication facilities. The company has a goal of building a room-sized error-corrected quantum computer with 1,000,000 physical qubits.

Events
Find a new conference or learning opportunity at our events page, or check out an upcoming webinar.

The 2021 Embedded Vision Summit will be held May 25-28.

The OpenHW Group will host a webinar on May 27, 8am PDT,  focused on continuous integration and how it is employed in the CORE-V projects.

The ESD Alliance will host a panel on June 9, 9-10am PDT, focused on building chips remotely during the pandemic.