U.S. restricts investment in Chinese chip companies; SK Hynix unfurls 321-layer NAND; Renesas to buy Sequans for cellular IoT; UCIe 1.1; CXL.
U.S. President Joe Biden issued an executive order to restrict U.S. investment in Chinese companies, targeting semiconductors and microelectronics, quantum information technologies, and artificial intelligence systems with military or intelligence applications. Specific technologies within these groups will be defined later. Some will only require investors to notify the Department of the Treasury, while those the government deems pose a “particularly acute national security threat” will be blocked entirely. The Treasury is considering prohibiting investment in Chinese EDA and semiconductor equipment companies.
SK Hynix demonstrated 321-layer 1Tb Triple Layer Cell NAND. The company expects to start mass production from the first half of 2025.
Renesas Electronics plans to acquire Sequans Communications, a provider of 5G/4G cellular IoT chips and modules, in a deal that values Sequans at $249 million, including net debt. Renesas said it will integrate Sequans’ cellular connectivity products and IP into its core product lineup, including microcontrollers, microprocessors, analog and mixed signal front ends. The deal will enable Renesas to expand to the wide-area network (WAN) market space and enhance personal-area network (PAN) and local-area network (LAN) products. The deal is expected to close by Q1 2024.
The UCIe Consortium released the UCIe 1.1 specification. Updates include extending reliability mechanisms to more protocols, supporting broader usage models such as automotive, and enabling lower-cost packaging implementations. The specification also details architectural specification attributes to define system setups and registers that will be used in test plans and compliance testing to ensure device interoperability. The consortium is also creating a working group to focus on automotive.
What will it take to enable mass customization of edge IoT devices? Data flow computing and coarse-grained reconfigurable arrays could play a role.
Allegro Microsystems plans to acquire Crocus Technology, a provider of tunnel magnetoresistance (TMR) sensor technology, for $420 million in cash. The acquisition will support growth in applications such as e-mobility, clean energy, and industrial automation.
Infineon Technologies debuted new MCU embedded power IC products for the automotive market that integrate a gate driver, microcontroller, CAN FD communication interface, and power supply. Infineon also expanded its portfolio of automotive MOSFETs in the 60V and 120V range with new products in the high power packages TOLL, TOLG, and TOLT.
The University of Stuttgart and Keysight Technologies teamed up on 6G IC research with a multiplexing platform for synchronous time- and frequency-domain analyses of ultra-broadband communication channels. The research lays the foundation for noise and linearity performance for analyzing wideband, high-frequency modulated performance of components, circuits, and transceivers.
NVIDIA announced the next generation of its Grace Hopper platform, which incorporates HBM3e. The GH200 will be available in a range of configurations for large language models, recommender systems, and vector databases, including a dual configuration that comprises a single server with 144 Arm Neoverse cores, eight petaflops of AI performance, and 282GB of HBM3e memory.
Industry experts discuss how the shift toward chip design on cloud has sped up, whether the benefits of cloud are realized in chip design, and some of the most pressing challenges to chip design on cloud today
CEVA updated its family of NPU IP with support for transformer networks in addition to CNNs and other neural networks. It targets inferencing workloads in the cloud to the edge.
Lishen Battery adopted Siemens Digital Industries Software’s Xcelerator platform to provide data traceability and connectivity throughout battery product research and development, as well as the manufacturing process.
The MIPI Alliance and Automotive SerDes Alliance plan to create a pathway so that implementers will be able to use MIPI Camera Serial Interface 2 (MIPI CSI-2) natively with the ASA Motion Link (ASA-ML) physical layer (PHY) interface. Supporting specifications would also be made available through this pathway, such as MIPI Camera Service Extensions (MIPI CSE), which provides protocol-layer security and additional functional safety support.
Magneto-resistive RAM (MRAM) appears to be gaining traction at the most advanced nodes, in part because of recent improvements in the memory itself and in part because new markets require solutions for which MRAM may be uniquely qualified.
Lightelligence introduced optical networking transceiver designed for PCIe and Compute Express Link (CXL) that can connect remote devices together using CXL over lower-latency fiber optic cable.
XConn Technologies emerged from stealth to introduce a hybrid CXL 2.0 and PCIe Gen 5 switch with low port-to-port latency and power consumption per port. The 256-lane switch is designed for AI, ML, and HPC applications. It is used in a 2TB pooled CXL memory system for AI announced with Samsung, MemVerge, and H3 Platform.
Micron Technology uncorked memory expansion modules in 128GB and 256GB capacities that support CXL 2.0.
Winbond’s TrustME W77Q Secure Flash family received certification for the ISO/SAE 21434 automotive cybersecurity standard.
Sandia National Labs developed heterogenous integration techniques for integrating many different materials onto silicon, enabling it to build high-bandwidth, high-speed optical devices, including indium phosphide lasers, lithium niobate modulators, germanium detectors, and low-loss acousto-optic isolators.
A team from Japan’s National Institute for Materials Science (NIMS) and the Tokyo University of Science created what it claims is the fastest neuromorphic electric double layer transistor using a highly ion conductive ceramic thin film and a diamond thin film. It could be used in edge AI devices for image, voice, and odor recognition.
DARPA launched the Synthetic Quantum Nanostructures (SynQuaNon) program to develop synthetic metamaterials for quantum information science that allow for higher operating temperatures to significantly reduce size, weight, and power (SWaP) requirements.
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