Week In Review: Design, Low Power

FPGA HLS flow; PCIe and NVMe debug; Ansys results.


Achronix and Mentor uncorked an optimized HLS flow for Achronix’s FPGA technology products. The integrated development environment enables designers to quickly go from C++ to FPGA using Mentor’s Catapult HLS and Achronix’s ACE design tools. Initially used for 5G wireless applications to reduce the overall development effort and improve QoR, it is suitable for any design targeting Achronix technology.

eSilicon will use the SiFive E2 Core IP Series in its next-generation 7nm SerDes IP. The SerDes IP uses a DSP-based architecture and two 7nm PHYs support 56G and 112G NRZ/PAM4 operation, and multi-link and multi-rate operations per SerDes lane. The IP targets server, fabric and line-card applications.

Avery Design Systems’ PCI Express and NVM Express VIP solutions have been paired with Teledyne LeCroy Summit Z3-16 and Z416 Protocol Exercisers for post-silicon, at-speed bring-up and validation and debug of PCIe 4.0 and NVMe 1.3 SSD designs using traffic generation files automatically converted from selected SystemVerilog/UVM testcases running in the RTL simulation and emulation.

ANSYS reported second quarter 2018 financial results with revenue of $305.9 million. On a GAAP basis, earnings per share were $1.08, with non-GAAP earnings per share of $1.35. This year, the company changed accounting standards; under the previous standard, revenue was $294.0 million, up 11% from the same quarter last year. GAAP earnings per share were $0.96, up 20% from Q2 2017, and non-GAAP earnings per share were $1.24, up 25%. ANSYS CTO Maria Shields noted that the “recent acquisition of OPTIS contributed $6.6 million to non-GAAP revenue during the two months since the closing of the acquisition.”

Additionally, HiSilicon adopted ANSYS’ suite of semiconductor and electronics simulation solutions for power integrity and reliability signoff at all advanced process nodes including 7nm and 5nm.

This year, DRAM is expected to account for nearly one in four IC sales dollars spent with sales reaching $101.6 billion, according to market research firm IC Insights. This would keep DRAM as the largest market segment. The runner up, NAND flash, is expected to see sales of $62.6 billion this year.


Hot Chips: August 19-21 in Cupertino, CA. The symposium for high-performance chips will feature a number of sessions on machine learning architectures as well as discussions of hardware security methods, blockchain, and acceleration.

Leave a Reply

(Note: This name will be displayed publicly)