The Week In Review: Design

Ansys acquires simulation rendering company; open source mixed-signal framework; software integrity.

popularity

M&A
Ansys acquired Computational Engineering International (CEI), the developer of a suite of products that helps analyze, visualize and communicate simulation data. Founded in 1994 as a spin-off from Cray Research, the company’s program covers a wide range of data formats. Terms of the deal were not disclosed.

IP
Efabless launched an open source framework that allows community members to create, share, make derivatives of and commercialize mixed-signal ICs. The framework includes all the tools needed for a full design cycle to design, verify, validate and prototype mixed-signal products, says the company, as well as an open source chip called Hydra, analog IP ready to wire, a standardized pad frame and a serial interface (SPI).

Arasan uncorked UFS 3.0 controller IP, supporting a maximum throughput of 11.6 Gbps with M-PHY HS-Gear 4 2-lane operation. The IP incorporates MIPI UniProSM version 1.6 link layer with support for multi-lane operation and the optional Unified Memory Architecture implementation.

Faraday released USB 3.1 PHY IP on the UMC 28HPC process, as well as silicon-verified USB 3.1 Type-C PHY with USB-PD 2.0 support on the UMC 40LP process.

Embedded & Security
Mentor announced a new Android implementation for Xilinx’s Zynq UltraScale+ MPSoC developer platform. It includes an Android 6.0 board support package (BSP) built on the Android Open Source Project, as well as source code and pre-compiled binaries for the Xilinx ZCU102 development platform. The software is available at no charge, while Mentor offers additional commercial support and customization services.

Synopsys updated its Software Integrity Platform suite for software security and quality, adding support for new programming languages, full coverage for the Motor Industry Software Reliability Association (MISRA) guidelines, improved automation and integration capabilities, and an SDK for building custom fuzz testing tools.

Nagoya University’s AUTOSAR-compliant TOPPERS ATK2-SC1 RTOS automotive kernel has been ported to Cadence’s Tensilica processors and DSPs. TOPPERS manages the detailed timing of software tasks in automotive system control applications.

Deals
STMicroelectronics incorporated Kilopass’ XPM one-time programmable (OTP) anti-fuse NVM memory IP into an ADAS IC. The IP stores configuration settings for automotive peripheral sensors and was implemented in a TSMC finFET process.