Where SoCs Don’t Go

By Pallab Chatterjee
The National Association of Broadcaster show is the one place where you can be sure to find some of the most advanced technology on the planet—the kind of stuff used to broadcast, capture and edit 3D content. But while the market for this kind of technology is growing, the quantities of like products are still not high enough to warrant ASICs.

It’s a world dominated by FPGAs, and the leaders on the equipment side are Xilinx and Actel. They accounted for just about all of the visible FPGAs on the show floor. What was particularly interesting, though, was that the chips were not even the fastest chips in the FPGA companies’ lineup. They were not at the most advanced (smallest geometry) process. And they didn’t use the largest number of cores. In fact, most of the FPGAs were one or two generations behind.

The most popular chip on the show floor was the Virtex-4, which was used in most of the single-width and height cards from Grass Valley Group, Miranda and others. The cards are either single-, dual- or quad-channel functions. Based on the card size, mechanical cabling connections and simultaneous switching characteristics, moving to a higher channel configuration than a quad does not make a lot of design sense. As a result, the older technology (90nm, 1.2v core, sub 960 I/O) does just fine with the data rates, signal integrity and jitter levels that are required for video processing. These chips can support the mainstream SD and HD data rates, the 3Gb/s SDI channels for streaming data and the high speed 6.5Gb data channels, if required.

As the chips include both DSP cores and processor cores, the codec functions needed for signal processing, and signal conditioning are easily implemented. This split architecture, supported by the local in-die memory allows the flexibility to support the multiple standards such as MPEG2, JPEG 2000 and MPEG4. As some of these standards are still being finalized and adjusted (the 3D portion of the MPEG4 specification is in progress), the in-field programmability of the FPGAs is a major asset. This will allow currently deployed equipment to be upgraded to meet the data standards as they emerge, which would not be possible with an ASIC or SoC.

The globalization of video also has changed the hardware requirements for the post-processing and broadcast communities. It is not uncommon for a single editing station to be receiving input from PAL, DVB, ATSC, P2 media, SD card, 3Gb fiber, 6Gb fiber channels, SD and 720 / 1080 HD data sources. This combo of inputs requires mixing and editing hardware to perform transformation to common formats, in addition to signal steering. This mix of data formats requires the chips have multiple clock domains with very small skews and tracking that is systematic (frame- and line-based rather than absolute psec based). The FPGA products, with their multiple distributed logic functions and distributed clock domains, fit this requirement well.

While some of the high-density video functions are power-sensitive, the broadcast signal processing cards are not. High-speed cross point switches, which may be as large as 200 x 200 channels, are shooting for power factors in the 100mW to 400mW per channel range. The signal processing cards typically consume 25W to100W/channel for the rack based systems.

For 3D, the hardware can utilize the same base chips. As the 3D formats are based on left and right eye frames each being shown at half the data rate, the performance requirements for the processing chips do not change. The new 3D capable products featured a reconfiguration of the control logic for the dual-frame format, but left the interfaces the same while remaining on the same FPGA platforms.

The display side of the 3D world (TVs and set-top boxes) is much more standardized on their data and has a much more limited I/O requirement. While these applications are good targets for SoCs and ASICs, the signal-processing world for video appears to remain the province of FPGAs.