Printed electronics for RFID’s make progress

The business opportunity for RFIDs is well-defined.

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The news that a printed electronics startup, Kovio, had received new round of funding prompted further thoughts on exactly where printed electronics will pay off.

Kovio raised $15 million to pursue Near Field Communication (NFC) RFID devices. NFC’s claim to fame is that it supports communication by touch. One of the most talked about applications for NFC is to use a cell phone as a credit card, where NFC replaces swiping the magnetic strip. Other applications for NFC include tags on a museum or retail display to get more information or an audio or video presentation. The funders of Kovia, Tyco Retail Solutions, are “Helping retailers reduce theft, enhance store security, increase shopper conversion and improve operational efficiency.” It makes sense that they would see high information content RFID as an opportunity. Today, NFC is commercial technology for example, Nokia recently announced their “3G N6212 Classic Cell Phone With Integrated NFC”.

Kovio are using a ink jet printer to create patterns in “silicon ink” and have fabricated fully functioning transistors as shown below.

Kovio

An all printed silicon transistor from Kovio (www.kovio.com/technology.html)

The question is why does it make economic sense to make RFID’s in printed electronics ? Low cost applications being implemented in printed electronics, with large critical dimensions of 10-20 um, would seem to run counter to one of the most basic tenets of Moore’s law. Moore’s law shows that the cost per transistor has plummeted over the last 30 years as the feature size has shrunk, in-spite of the rocketing cost of fabs. Todays advanced silicon has 20 nm features, ie. a transistor area that is a million times smaller than printed electronics.

However, for a small transistor count device, the device size is limited by contact pads that support connection to the outside world, not transistor size as shown below. There are a minimum of 4 – 50 um pads per chip, so the smallest real device size is limited to roughly 200 um on a side. If there is no area advantage for advanced silicon, then a device made with larger dimensions and a consequent lower cost manufacturing process can win.

 

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Add to this, a printed device with integrated logic, memory, I/O, battery and even display, all fabricated simultaneously, and you can eliminate package and PCB costs associated with silicon devices. Eliminating package costs is a very big deal when you want product cost of the order of cents.

Therefore, for low transistor count devices, printed electronics will be lower cost than advanced silicon. The exact crossover point in Total Cost of Ownership (TCOO) between high density silicon and printed electronics will depend on all sorts of device specific details. I think that a realistic estimate of the crossover point is somewhere around 100,000 transistors based on the fact that roughly 30,000 20 nm node transistors will fit in a single contact pad. A comprehensive TCOO model will probably conclude that 100,042 transistors is the real crossover!

Large area devices are the natural application for printed electronics. Displays are the “holy grail” opportunity for super thin flexible large area electronics. The large area means that traditional silicon technology cannot be used, and an entire new Flat Panel Display industry has developed around LCD devices on ridiculously large glass sheets. Replacing the glass sheet with a flexible sheet is a huge opportunity.

There are other applications that need large area and are uniquely suited to printed electronics. DARPA has funding projects at Xerox’s PARC center to print x-ray sensors on a flexible, lightweight sheet that can be folded over the soldiers helmet. These sensors measure the soldiers exposure to explosions. Xerox Parc is now offering printed electronics foundry services based on this technology.

My take is that the business opportunity for printed electronics is well defined and is not limited to the very large area devices with extreme defect density challenges. My next blog will consider the different competing manufacturing approaches to printed electronics.

About the author

Mike Watts has been patterning since 1 um was the critical barrier, in other words for a longtime. I am a tall limey who is failing to develop a Texas accent here in Austin. I have a consulting shingle at www.impattern.com.
My blog “ImPattering” will focus on the latest developments in the business and technology of patterning. I am particularly interested in trying to identify how the latest commercial applications evolve.


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