May 2013 - Page 3 of 6 - Semiconductor Engineering

Software-Driven Electronic Design Automation
By Frank Schirrmeister - 21 May, 2013 - Comments: 1

As the EDA industry prepares to descend on Austin in less than two weeks for the 50th annual Design Automation Conference (DAC), I am wondering what this DAC will be about. It’s pretty simple. One of the key themes will be about “software-driven EDA,” a term I’d love to claim to have invented but am happy to attribute to Jim Ready of Ready Systems and Montavista fame – our chief techn... » read more

3D Brings Test Into Fashion
By Ann Mutschler - 16 May, 2013 - Comments: 0

By Ann Steffora Mutschler As integral and critical as test is to the success of an SoC, it isn’t always one of those topics in semiconductor design that seems fashionable. But as Bassilios Petrakis, director of product marketing for test products at Cadence pointed out, “[Test] is not in fashion, but when we hit one of those brick walls then suddenly we have to think how we are going to... » read more

3D NAND Market Heats Up
By Mark LaPedus - 16 May, 2013 - Comments: 0

By Mark LaPedus It’s the tale of two promising and separate 3D chip architectures. One technology is slowly taking root, while the other one is heating up. 3D stacked-die using through-silicon vias (TSVs) is on the slower path. Advanced chip-stacking has several challenges and is still a few years away from mass production. In contrast, 3D NAND is heating up, as Samsung and SK Hynix are a... » read more

Inside Leti’s Litho Lab
By Mark LaPedus - 16 May, 2013 - Comments: 0

By Mark LaPedus Semiconductor Manufacturing & Design sat down to discuss future lithography challenges with Serge Tedesco, lithography program manager at CEA-Leti; Laurent Pain, lithography lab manager at CEA-Leti; and Raluca Tiron, a senior scientist at CEA-Leti. SMD: CEA-Leti has two major and separate programs, including one in directed self-assembly (DSA) and another in multi-beam ... » read more

The Bumpy Road To 450mm
By Mark LaPedus - 16 May, 2013 - Comments: 0

By Mark LaPedus After its formation nearly 20 months ago, a 450mm consortium has reached its latest milestone by recently completing a cleanroom and installing the first 450mm demonstration tools in the facility. The so-called Global 450 Consortium (G450C) also has set a goal to bring 450mm fabs into high-volume manufacturing at the 10nm or 7nm nodes by 2018. That gives the industry a littl... » read more

Trickle Down Equipment Economics
By Jeff Chappell - 16 May, 2013 - Comments: 0

By Jeff Chappell By now, with the rise of China as a center of manufacturing, everyone in the chip industry has no doubt heard of the supposed Chinese curse, "May you live in interesting times." It's practically cliché. The thing is, the next two industry cycles may indeed prove interesting for the used equipment market. At the moment, everyone is tired of interesting times, and those in ... » read more

New Foundry Gold Rush: RF SOI
By Mark LaPedus - 16 May, 2013 - Comments: 0

By Mark LaPedus About every five years or so, a new and hot market emerges in the specialty foundry business that resembles a frenetic gold rush. The last big gold rush occurred around 2008, when more than a dozen foundries jumped into the bipolar-CMOS-DMOS (BCD) market to capitalize on the booming power-management sector. Now, the next gold rush is centering on an emerging technology—th... » read more

Painting By Numbers
By Joanne Itow - 16 May, 2013 - Comments: 0

By Joanne Itow Semiconductor revenue growth dropped to a compound annual growth rate of only 3.4% over the past five years and units grew only 3.0%. Throughout the same period, semiconductor wafer demand grew 6.6%, higher than unit growth but lower than the historical average. What caused this decline and will the industry ever get back to ‘normal’ growth rates? Figure 1. Annual Growth ... » read more

Between A Rock And A Hard Place
By David Abercrombie - 16 May, 2013 - Comments: 0

By David Abercrombie My previous articles included a lot of discussion about correcting error violations in double patterning (DP). This time let’s take a step back up the design flow. DP requires a design team to make some important decisions about standard cell design methodologies, or risk running into serious placement issues down the line. Understanding why this is so, and what your opt... » read more

Photomask Market Update
By Lara Chamness - 16 May, 2013 - Comments: 0

By Lara Chamness The worldwide semiconductor photomask market was $3.2 billion in 2012 and is forecast to reach $3.5 billion in 2014. After reaching a market peak in 2011, the photomask market contracted 4 % in 2012. The mask market is expected to grow 3 % and another 3% sequentially over the next two years. Key drivers in this market continue to be advanced technology feature sizes (less than... » read more

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