September 2014 - Page 8 of 11 - Semiconductor Engineering


Where Is Gene Roddenberry When You Need Him?


As we chatted the other day, my colleague Scott Lewis said something so deceptively simple that it made us stop in our tracks. “We need another Gene Roddenberry,” he said. The Star Trek creator in the 1960s introduced the world to an array of futuristic technologies (the tricorder, wireless ear sets and so on) that in effect became our collective electronics product roadmap. We have m... » read more

Manufacturing Test Robustness


The recent 6.0 earthquake near Napa California caused close to $50 million in damages to the wineries and property in the region. The San Francisco bay area is accustomed to earthquakes and hence structural engineers design buildings to bear high intensity earthquakes amongst other natural disasters. The damage to property would have been much higher if not due to the strict guidelines followed... » read more

Advances In Power Management For Physical IP In 28nm And FinFET Process Nodes


Engineering techniques to reduce power consumption by lowering the supply voltage and slowing the clock speed have reached practical limits of the semiconductor technologies. Newer solutions, which not only reduce power but also actively manage the power during the course of the SoC (system on chip) activity, are emerging. This article describes these innovations from the foundation intellectua... » read more

Extending Power Analysis To The Emulation of Complex SoCs


Using hardware emulation to estimate SoC power consumption delivers significant value. Emulators are capable of long runs on large designs, making it practical to emulate an RTOS boot sequence or graphics processing of multiple frames. Estimating power consumption of these advanced functions executing across the complete SoC provides valuable insight into the chip’s power draw and its impact ... » read more

Collaboration Accelerates Moore’s Law


Moore's Law dictates that the number of transistors in dense, integrated circuits will double approximately every two years. Maintaining this pace of scaling, however, has become increasingly difficult given the ever-increasing complexity inherent with new chip starts. Additionally, the cost of using leading-edge process technology is prohibitively expensive. As a result, collaboration amon... » read more

More Problems Ahead


Semiconductor Engineering sat down to discuss future scaling problems with Lars Liebmann, a fellow at IBM; Adam Brand, managing director of transistor technology at Applied Materials; Karim Arabi, vice president of engineering at Qualcomm; and Srinivas Banna, a fellow for advanced technology architecture at GlobalFoundries. SE: Where are the most severe issues these days? Is it on the design... » read more

Implementation Challenges And Solutions Of Low-Power, High-Performance Memory Systems


Mobile devices and their demand for rapid innovation have fundamentally and forever changed the semiconductor industry. These devices have fueled tremendous innovation in the last few years to bring about drastic improvements in performance, power and cost efficiency. They also demand condensed product development cycles which accelerate the rate and need for innovation. The only thing that has... » read more

Blog Review: Sept. 10


eSilicon’s Mike Gianfagna is searching for patterns and trends in the industry, ranging from big data and the cloud to the IoT. Check out the four V’s. The market for wearables is gaining momentum. Apple made a huge deal out of its Apple Watch this week, but it wasn’t alone. ARM’s David Maidment is on the ground in Berlin looking at the new gear based on Android. Mentor’s John... » read more

Smart Grid Security


Smart energy is an all-inclusive term that refers to upgrading the energy grid so it can support bi-directional flow of energy and data. Such an endeavor involves adding connectivity, communication, and security features not only to the smart grid but to the many devices connected to a smart grid. But how do you ensure all devices on the network are secure? This paper looks into two key softwar... » read more

RTL Design-for-Power (DFP) Methodology


Commercial power analysis tools have been available now for over 10 years, operating at the gate and transistor level of abstraction. For analog, mixed-signal, and custom designs, transistor-level tools are utilized as both design and verification tools, meaning that they help designers analyzing power and serve as the final ‘sign-off’ to ensure that power specifications are met. For standa... » read more

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