July 2016 - Page 3 of 12 - Semiconductor Engineering


Blog Review: July 27


Mentor's Tom Fitzpatrick investigates how to add new behavior to an existing testbench with the UVM factory class. Synopsys' Srinivas Vijayaragavan and Pooja Gupta dig into new features of SAS 24G, including how its effective speed was doubled to 24G though signaling rate remains at 22.5G. Cadence's Paul McLellan highlights a presentation from the SEMI/Gartner Market Symposium focused on ... » read more

How Cache Coherency Impacts Power, Performance


As discussed in part one, one of the reasons cache coherency is becoming more important is the shared common memory resource in designs today. Various agents in the design want to access the data the fastest they can, putting pressure on the CPU complex to manage all of the requests. Until a generation ago, it was okay for the CPU to control that memory and have access to it, as well as be t... » read more

Formal Analysis Of X Propagation


Verifying the absence of undefined signal values in a design is in general a hard problem. Formal 4-state logic analysis offers a powerful solution. This white paper discusses X-related verification issues, and how advanced 4-state formal analysis solves them. This white paper covers the 360 DV-Verify product. To read more, click here. » read more

Architecting Memory For Next-Gen Data Centers


The industry’s insatiable appetite for increased bandwidth and ever-higher transfer rates is driven by a burgeoning Internet of Things (IoT), which has ushered in a new era of pervasive connectivity and generated a tsunami of data. In this context, datacenters are currently evaluating a wide range of new memory initiatives. All seek to optimize efficiency by reducing data transport, thus sign... » read more

Analog Devices To Buy Linear Technology


Analog Devices has agreed to acquire Linear Technology for about $14.8 billion in cash and stock, creating an analog chip supplier that will rival Texas Instruments, STMicroelectronics, Infineon Technologies, and NXP Semiconductors in scope. The deal calls for Linear Technology shareholders to get $46 per share in cash and 0.2321 of a share in ADI common stock for their shares. The transa... » read more

Mixed-signal/Low-power Design


Semiconductor Engineering sat down to discuss mixed-signal/low-power IC design with Phil Matthews, director of engineering at Silicon Labs; Yanning Lu, director of analog IC design at Ambiq Micro; Krishna Balachandran, director of low power solutions marketing at [getentity id="22032" comment="Cadence"]; Geoffrey Ying, director of product marketing, AMS Group, [getentity id="22035" e_name="Syno... » read more

Getting The Jump On Analog/RF IP


When Magma Design was sold to Synopsys in 2012, then-president and COO Roy Jewell sat down with VC Lucio Lanza to figure out what to do next. As Jewell tells it, Lanza convinced him not to take another job. While it’s too early to tell if that was sage advice, it did trigger a search for a new business and a way of funding it. Jewell said that when Magma went looking for money, it raised $... » read more

System Bits: July 26


Mixing topology, spin MIT researchers are studying new compounds, such as topological insulators (TIs), which support protected electron states on the surfaces of crystals that silicon-based technologies cannot as part of the pursuit of material platforms for the next generation of electronics. They report new physical phenomena being realized by combining this field of TIs with the subfiel... » read more

Leading Chip Maker Rolls Out SoC For Automotive Market With NetSpeed Gemini


There is tremendous growth in the automotive IC market due to the trend towards electric or hybrid cars and applications for enhanced safety. However, the technical challenges of implementing today's connected car and the autonomous vehicles of the future are daunting. To read more, click here. » read more

Enhancing Verilog Designs With Embedded PSL


PSL (Property Specification Language) is one of the easiest introductions to the world of design properties, assertions and coverage points to anybody familiar with Verilog HDL. The designer of a digital circuit has the best understanding of the operation of the circuit, which makes her or him the best person to define properties that will fire assertion messages in case of incorrect design beh... » read more

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