February 2017 - Page 3 of 10 - Semiconductor Engineering

IP Qualification with Oasys-RTL
By Mentor, a Siemens Business - 22 Feb, 2017 - Comments: 0

With increasing design sizes and complexities, the use of IP (intellectual property) as basic building blocks for better SoC design is also increasing. This paper presents the challenges faced during IP integration at the SoC level and what can be done to mitigate those risks during IP development. Mentor’s Oasys-RTL RTL floorplanning and physical synthesis tool offers a unique IP qualificati... » read more

Massive SoC Designs Open Doors To New Era In Simulation
By Cadence - 22 Feb, 2017 - Comments: 0

As system-on-chip (SoC) designs have grown in size, simulation technologies have had to evolve dramatically to keep pace. We’re now at an inflection point where both speed and capacity are essential and new simulation technologies are needed to meet the demands. In this paper, we’ll discuss how simulation has evolved and examine how new technologies such as the Cadence RocketSimTM Parallel ... » read more

MEMS: A Tale Of Two Tough Markets
By Ed Sperling - 22 Feb, 2017 - Comments: 0

The MEMS market is growing rapidly, profits not so much. In most market segments, this would be a signal that more automation and standardization are required. But in the microelectromechanical systems world, fixes aren't so simple. And even where something can be automated, that automation doesn't work all the time. In fact, while MEMS devices are extremely difficult to design, build and ma... » read more

Big Changes In Patterning
By Ed Sperling - 22 Feb, 2017 - Comments: 0

Aki Fujimura, CEO of [getentity id="22864" comment="D2S"], sat down with Semiconductor Engineering to discuss patterning issues at 10nm and below, including mask alignment, the need for GPU acceleration, EUV's future impact on the total number of masks, and what the re-introduction of curvilinear shapes will mean for design. SE: Patterning issues are getting a lot of attention at 10nm and 7n... » read more

Blog Review: Feb. 22
By Jesse Allen - 22 Feb, 2017 - Comments: 0

Mentor's Brian Derrick digs into the state of the electric vehicle industry and whether established OEMs will be able to make the changes required to meet new consumer demands. Cadence's Paul McLellan listens in on how to greatly improve the efficiency of machine learning, without using custom hardware, in a talk by Stanford's Kunle Olukotun. Synopsys' Robert Vamosi warns not to overlook ... » read more

Fractilia: Pattern Roughness Metrology
By Mark LaPedus - 21 Feb, 2017 - Comments: 1

A new startup has emerged and unveiled a technology that addresses one of the bigger but less understood problems in advanced lithography--pattern roughness. The startup, called Fractilia, is a software-based metrology tool that analyzes the CD-SEM images of pattern roughness on a wafer. Fractilia, a self-funded startup, is led by Chris Mack and Ed Charrier. Mack, known as the gentleman sc... » read more

Manufacturing Bits: Feb. 21
By Mark LaPedus - 21 Feb, 2017 - Comments: 0

AFM-on-a-chip An atomic force microscope (AFM) is a metrology tool that can measure and characterize structures in three dimensions. It uses a tiny probe to enable measurements in chip structures, but the instrument itself is often a large and bulky system. In response, the University of Texas at Dallas has devised an AFM-on-a-chip technology. The AFM is roughly the size of a dime. Based on... » read more

System Bits: Feb. 21
By Ann Mutschler - 21 Feb, 2017 - Comments: 0

Recreating the brain Stanford University and Sandia National Laboratories researchers have created an organic, high-performance, low-energy artificial synapse for neural network computing that aims to better recreate the way the human brain processes information, and could also lead to improvements in brain-machine technologies. Alberto Salleo, associate professor of materials science and e... » read more

Power/Performance Bits: Feb. 21
By Jesse Allen - 21 Feb, 2017 - Comments: 0

Harvesting energy from multiple sources Researchers from the University of Oulu in Finland found a particular type of perovskite, KBNNO, has the right properties to extract energy from multiple sources simultaneously. While perovskites are particularly known for their use as solar cells, certain minerals in the perovskite family show piezoelectric and pyroelectric (harvesting energy from ... » read more

Semiconductor Process Development: Finding A Faster Way To Profitability
By Katherine Gambino - 20 Feb, 2017 - Comments: 0

Building a chip fabrication facility requires billions of dollars in investment for land, buildings, processing equipment, chemical and hazardous material safety, not to mention the deployment of hundreds of highly experienced process engineering and manufacturing personnel. Bringing up an advanced semiconductor process in any fab, new or established, is a several-hundred-million dollar effort,... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy