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Brian Bailey

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Brian Bailey is Technology Editor/EDA for Semiconductor Engineering.

Author's Latest Posts

Continuing Challenges For Open-Source Verification
By Brian Bailey - 01 Jun, 2021 - Comments: 1

Experts at the Table: This is the last part of the series of articles derived from the DVCon panel that discussed Verification in the Era of Open Source. It takes the discussion beyond what happened in the panel and utilizes some of the questions that were posed, but never presented to the panelists due to lack of time. Contributing to the discussion are Ashish Darbari, CEO of Axiomise; Serge L... » read more

A Price To Be Paid
By Brian Bailey - 27 May, 2021 - Comments: 1

Ancient wisdom says you should be careful what you ask for, because you just might get it. This was certainly true many times during my career within EDA, and I am sure it is still happening today. Sometimes the outcome was not what was wanted, or the price was higher than expected. As an example, consider VHDL, the language that was meant to correct the problems of Verilog. One of the probl... » read more

Do We Have An IC Model Crisis?
By Brian Bailey - 27 May, 2021 - Comments: 0

Models are critical for IC design. Without them, it's impossible to perform analysis, which in turn limits optimizations. Those optimizations are especially important as semiconductors become more heterogenous, more customized, and as they are integrated into larger systems, creating a need for higher-accuracy models that require massive compute power to develop. But those factors, and other... » read more

Scaling Simulation
By Brian Bailey - 27 May, 2021 - Comments: 1

Without functional simulation the semiconductor industry would not be where it is today, but some people in the industry contend it hasn't received the attention and research it deserves, causing a stagnation in performance. Others disagree, noting that design sizes have increased by orders of magnitude while design times have shrunk, pointing to simulation remaining a suitable tool for the job... » read more

Power Optimization: What’s Next?
By Brian Bailey - 17 May, 2021 - Comments: 2

Concerns about the power consumed by semiconductors has been on the rise for the past couple of decades, but what can we expect to see coming in terms of analysis and automation from EDA companies, and is the industry ready to make the investment? Ever since Dennard scaling stopped providing automatic power gains by going to a smaller geometry, circa 2006, semiconductors have been increasing... » read more

HBM Takes On A Much Bigger Role
By Brian Bailey - 13 May, 2021 - Comments: 1

High-bandwidth memory is getting faster and showing up in more designs, but this stacked DRAM technology may play a much bigger role as a gateway for both chiplet-based SoCs and true 3D designs. HBM increasingly is being viewed as a way of pushing heterogenous distributed processing to a completely different level. Once viewed as an expensive technology that only could be utilized in the hig... » read more

Standards, Open Source, and Tools
By Brian Bailey - 10 May, 2021 - Comments: 1

Experts at the Table: Semiconductor Engineering discussed what open source verification means today and what it should evolve into with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon Davidmann, CEO of Imperas Software; Serge Leef, program manager in the Microsystems Technology Office at DARPA; Tao Liu, staff hardware engineer... » read more

Roadblocks For ML in EDA
By Brian Bailey - 28 Apr, 2021 - Comments: 1

Is EDA a suitable space for utilizing machine learning (ML)? The answer depends on a number of factors, including where exactly it is being applied, how much support there is from the industry, and whether there are demonstrable advantages. Exactly where ML will play a role has yet to be decided. Replacing existing heuristics with machine learning, for example, would require an industry-wide... » read more

New Methodologies Create New Opportunities
By Brian Bailey - 27 Apr, 2021 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss what open source verification means today and what it should evolve into, with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon Davidmann, CEO of Imperas Software; Serge Leef, program manager in the Microsystems Technology Office at DARPA; Tao Liu, staff hardwa... » read more

Technology Access Discriminates
By Brian Bailey - 22 Apr, 2021 - Comments: 3

I try not to get on a soap box in my blogs, but I hope you will allow me to express a concern that I see building and the projection of an unintended outcome. I am talking about who does and does not have access to technology. Over time, this divide can cause a further division based on geography, income level, or some other factor. The ramifications of it are not realized until it is too late.... » read more

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