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Brian Bailey

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Brian Bailey is Technology Editor/EDA for Semiconductor Engineering.

Author's Latest Posts

Embedded Vision Becoming Ubiquitous
By Brian Bailey - 27 Aug, 2015 - Comments: 0

Embedded vision is becoming a topic of heated conversation thanks to the emergence of neural networks and their ability to make computer systems learn by example. Neural networks are a very different kind of processing element compared to the other kind of processors we have in the IP arsenal today in that they are not programmed in the same manner. They do not have a stream of instructions... » read more

Electronics Butterfly Effect
By Brian Bailey - 27 Aug, 2015 - Comments: 1

Everyone has heard of the butterfly effect where a small change in a non-linear system can result in large difference in an outcome. For the past 40 years, the electronics industry has approximated a linear system, fed primarily by Moore’s Law. The incremental changes available at each new process node have led us to make incremental changes and improvements in many aspects of the design, its... » read more

What Is ‘Digital’?
By Brian Bailey - 27 Aug, 2015 - Comments: 1

I saw a LinkedIn article with this title a couple of weeks ago and was curious. Do we not know what digital is and do we need to question it? When I read the first line I was very surprised and somewhat confused. Ved Sen, the author said that, “Despite working in the digital space for years, now I was quite stumped a few weeks ago when I was asked to define it.” Why would digital be so d... » read more

Five Questions: Jeff Bier
By Brian Bailey - 26 Aug, 2015 - Comments: 0

Jeff Bier, founder and president of BDTI, sat down with Semiconductor Engineering to discuss the creation of the Embedded Vision Alliance and the proliferation of neural network technology into embedded systems. SE: Why was the Embedded Vision Alliance formed? Bier: About 5 years ago, computer vision was on the verge of becoming a world changing technology. It was becoming possible, for t... » read more

Tech Talk: 10nm Patterning
By Brian Bailey - 20 Aug, 2015 - Comments: 0

David Abercrombie, advanced physical verification methodology program manager at Mentor Graphics, talks about triple and quadruple patterning after 20/16/14nm and what design teams need to understand to get this right. [youtube vid=7bjutPWakpw] » read more

Intel Acquires Docea Power
By Brian Bailey - 14 Aug, 2015 - Comments: 0

Intel has quietly done another EDA acquisition, this time buying Docea Power, a small company based in Moirans, France. Docea had high-level power and thermal estimation tools. The acquisition closed July 31st. [getentity id="22222" comment="Docea Power"] was founded by two brothers, [getperson id="11137" p_name="Ghislain"] and [getperson id="11138" p_name="Sylvian"] Kaiser. Ghislain had spe... » read more

DVFS On The Sidelines
By Brian Bailey - 13 Aug, 2015 - Comments: 2

Power reduction is one of the most important aspects of chip design these days, but not all power reduction techniques are used equally. Some that were once important are fading and dynamic voltage, and frequency scaling (DVFS) is one of them. What's changed, and will we see a resurgence in the future? What is it? DVFS has physics powerfully in its favor. As Vinod Viswanath, director of res... » read more

Poised For Aspect-Oriented Design?
By Brian Bailey - 13 Aug, 2015 - Comments: 8

In 1992, [getperson id=" 11046 " comment="Yoav Hollander"] had the idea to take a software programming discipline called aspect-oriented programming (AOP) and apply it to the verification of hardware. Those concepts were incorporated into the [gettech id="31021" t_name="e"] language and [getentity id="22068" e_name="Verisity"] was formed to commercialize it. Hollander had seen that using obj... » read more

Securing EDA In The Cloud
By Brian Bailey - 30 Jul, 2015 - Comments: 1

In the first part of this article, EDA’s Clouded Future, the types of application suitable for cloud-based solutions were examined and the cost benefits that could arise for both EDA suppliers and consumers. Security has stood in the way of widespread adoption, but it is a little more complex than just being concerned about a theft of sensitive design data. Security involves data protect f... » read more

IP Verification Challenges
By Brian Bailey - 30 Jul, 2015 - Comments: 0

At the Design Automation Conference this year, the Designer and IP tracks were the stars of the show in many ways. These sessions catered to industry rather than academia and provided engineers with information they could directly use in their jobs. Many of the sessions were filled to capacity and Anne Cirkel, general chair for the 52nd DAC, was enthusiastic about the growing success of these t... » read more

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