Beam Me Up

By Mark LaPedus
For years, electron-beam tools have been struggling to keep up with photomask complexity, causing an alarming increase in write times and mask production costs.

Intel and others recently warned that e-beams soon could reach their fundamental limits, thereby requiring the need for new solutions. And in the multiple patterning era, mask makers could see their capital costs soar, as they may end up buying twice as many e-beam tools than before.

E-beams, which pattern the most advanced layers in a photomask, are based on a vector-shape beam (VSB) technology. “VSB architectures may not be adequate beyond 10nm,” said Mahesh Chandramouli, a photomask technologist who recently gave a paper on behalf of Intel. “We think new alternatives must be considered.”

Franklin Kalk, executive vice president and chief technology officer at Toppan Photomasks, framed the challenges in a different light. “If we continue to push out next-generation lithography, will we be able to meet the challenges with the existing technology? And if we do multi-patterning at 14nm, 10nm, and maybe 7nm, what does that mean for the mask writer? The real answer is that we’re going to have a big gap. We are not going to meet write time demands. By 2018, we will be in a tough state if we don’t do something different,” Kalk warned.

One solution to the problem is faster e-beams from the two main tool vendors-JEOL and NuFlare Technology. Other solutions include better shot count techniques, new data preparation methods and newfangled layout schemes.

The ultimate solution is a fast, multi-beam mask writer. And for some time, the spotlight has centered on IMS Nanofabrication, an Austrian-based company that has been working on a multi-beam mask writer that could speed up write times and lower photomask costs. Other companies, including KLA-Tencor and Mapper Lithography, are developing multi-beam tools for another application, namely direct-write maskless lithography.

It could be several years before multi-beam tools enter the commercial market. There are some major technical hurdles and a perceived funding gap associated with e-beam technology in general. The big question is whether the industry is willing to make the necessary investments to commercialize multi-beam. And does the industry have the patience to wait. “It’s an investment issue more than anything else,” said Aki Fujimura, chairman and chief executive of D2S. “If there was more funding, (e-beam technology) would be much more successful.”

End of the vacation
The photomask industry is changing on several fronts. Until the mid-1990s the industry enjoyed what was commonly called the “mask makers’ holiday.” Chip feature sizes were larger than lithography wavelengths, making photomask production a straightforward process.

The vacation abruptly ended in the late-1990s, when the industry was forced to extend 248nm wavelength lithography amid delays with 193nm technology. IC features became smaller than lithography wavelengths, prompting the need for resolution enhancement techniques (RETs).

Today, the industry is not counting on another vacation. IC makers are pushing 193nm lithography far beyond what was once possible, thereby adding more RETs and multiple patterning to the mix. Extreme ultraviolet (EUV) lithography was supposed to provide some relief, because it brings patterning back to single exposure. EUV is late due to an assortment of problems.

Perhaps the only silver lining is that mask costs are not increasing as fast as some had predicted. Mask costs are increasing on a linear curve, but clearly, there are new and complex challenges ahead. “At the 90nm node, there was a need for mild optical proximity correction (OPC),” said Amitabh Sabharwal, general manager for mask etch products at Applied Materials. “At 45nm, there was moderate OPC. Moving down to 22nm, there is aggressive OPC. Where we are headed right now is what I call crazy OPC. The sub‐resolution assist features (SRAFs) are extremely small, and, on top of that, there are a lot of them on the mask itself.”

Going forward, verification costs and OPC run times are expected to soar at 10nm and beyond. “The total run times scales in accordance with the number of patterning steps,” said Yuri Granik, chief scientist within the Design to Silicon Division at Mentor Graphics. “Double patterning alone and SRAFs will increase OPC run times by 1.3x to 2x.”

Mask complexity is increasing in other respects. In total, the average layers in a mask set jumped from 25 at the 180nm node, to 45 to 50 at 28/32nm. At 20nm, a mask set could have 75 layers. And in multi-patterning, the number of layers escalates. For example, in double-patterning, a single mask layer becomes two layers.

The trouble is that e-beams are not keeping up with the extensive use of OPC and other RETs, causing write times and costs to jump. From 2001 to 2005, e-beam write times were constant, averaging 8 hours per mask set, Toppan’s Kalk said. Then, from 2007 to 2012, the average write times rose to about 10 hours per mask set, he said.

“The average write time for a high-end mask is around 10 to 12 hours right now. Twelve hours doesn’t sound like much, but thrown into that are some 5 hour write times and some that are 40 hours,” he said. “Based on the predictions we have, it looks like we’ll see a lot more of the 40 hour variety and a lot less of the 5 hour variety in the next few years.”

Multiple patterning is also causing a change in the mask production flow. Typically, mask makers process a mask set using one e-beam. In double patterning, which involves two separate masks, photomask makers could write the critical layers in sequential steps using one e-beam tool.

In a more likely scenario, a mask maker would simultaneously utilize two e-beams to process each mask to speed up the process. That means a photomask vendor must procure more e-beams, thereby increasing their capital costs. In total, an e-beam sells from $20 million to $50 million each, depending on the configuration.

The solutions
To keep capital spending and mask costs at bay, Kalk listed three possible solutions: shot count optimization, one-dimensional layouts, and multi-beam mask writers. “We need all of them,” he said.

Responding to the demands, JEOL and NuFlare separately have been shipping faster e-beams. “There are always people who say e-beams will only go for one more node,” said Russell Cinque, an applications manager for the Electron Beam Lithography Products Division at JEOL. “Then, e-beams are able to extend for another two or three nodes. Looking into the future, we need to make some improvements, but we are confident we can meet spec.”

But at 20nm and beyond, the SRAFs and related features are projected to be 80nm in width or smaller, making mask accuracy and yield difficult to maintain. The number of e-beam shots required to create these complex features is expected to cause mask write times to soar.

To help their causes, e-beam vendors are reaching out to the EDA industry for help. For example, Aselta has tuned its preparation software that promises to streamline the data flow for NuFlare’s EBM-8000 e-beam. In a separate effort, D2S recently rolled out TrueMask MDP, a model‐based mask data preparation (MB‐MDP) technology. TrueMask MDP reduces e-beam shot count to cut mask write times by 20% to 30%.

In addition, the industry is looking at one-dimensional layouts based on gridded design rules. In this approach there are two lithography steps—grating and line cuts—to pattern designs. Using this complementary lithography technique, the mask is supposedly less complex, thereby reducing mask write times.

Still, there is an urgent need for one solution: multi-beam mask writers. This technology makes use of multiple beams to speed up write times. “There is a consensus that the industrial needs can only be met by adopting multi-beam mask writing techniques,” said Elmar Platzgummer, chief executive of IMS.

Nevetheless, multi-beam vendors are making slow progress after years of R&D. There are daunting challenges in herding multiple beams in a system at tight resolutions and accuracies. In part, vendors blame the sluggish progress on the lack of industry funding, as compared to what the cash-flush EUV community has garnered.

The industry is finally stepping up to the plate. For example, DNP, Intel, Photronics and TSMC have joined IMS’ multi-beam development collaboration effort. In addition, IMS has recently completed a proof-of-concept technology, dubbed the electron multi-beam Mask Exposure Tool (eMET).

Using 262,144 programmable beams with 20nm beam sizes, the 50-keV tool has demonstrated a half-pitch resolution capability of 24nm, Platzgummer said. IMS is looking to bring out its tools for “the 11nm half-pitch node,” he said. The goal is to have an alpha tool in 2014, beta machines by 2015, and a high-volume mask writer by 2016.

For a different application, namely maskless lithography, KLA-Tencor recently reported progress for its technology, dubbed Reflective Electron Beam Lithography (REBL). Recently, KLA-Tenor installed a CMOS-based digital pattern generator module on its system. This enables more than 1 million beams at full current, said Regina Freed, process development marketing manager for the REBL program.

“Multibeam is a disruptive writing technology,” noted Toppan’s Kalk. “If we don’t get something like that by 2018, it’s going to be a tough business model for everybody.”