Blog Review: Feb. 18

Ansys’ Justin Nescott digs up the top five engineering articles of the week. A thermal mapping microwave may make finding cold centers in nuked food a thing of the past. Plus, in hospitals your next meal might be delivered by a robot.

Worried about your car being hacked? Maybe you should be. Mentor’s John Day pulls out important points from the recent security report on wireless-enabled vehicles.

Sometimes it appears as if designers want to make the life of the verification engineer as miserable as possible. Cadence’s Dimitry Pavlovsky shows how they do this with the ARM AMBA 5 Coherent Hub Interface with embedded L3 cache.

Continuing with the theme of verifying large ARM-based SoCs, Synopsys’ Satyapriya Acharya asks if it is possible to create a reusable verification environment which can be tweaked minimally for design variants. He starts by identifying the types of verification needed for AMBA-based subsystems.

Don’t dig a grave for passwords yet. Rambus’ Aharon Etengoff looks at why they’re still hanging on and the difficulties of moving to more secure authentication methods.

64-bit is twice as good as 32-bit – right? ARM’s Andy Nightingale talks about the trends in requirements for mobile phones and about the insatiable demands for performance and bandwidth and why this caused the shift to 64-bit.

Last month Steve Schulz visited Cadence to discuss how engineering teams need to re-think design for IoT. Cadence’s Brian Fuller shares the details of his talk.

How many ASIC gates can you fit into an FPGA? It can be a tricky question but Synopsys’ Michael Posner provides some rules of thumb to get you close to the number, but warns you that thumbs are difficult to measure.

ARM’s Brad Nemire rounds up the latest community happenings. There’s been quite a bit of discussion around the new IP suite. Check out the tutorial on turning your smartphone into a desktop, too.

And in case you missed last week’s Low Power-High Performance newsletter, here are some noteworthy blogs:

Editor in Chief Ed Sperling contends the current ways of measuring energy efficiency are useless and it’s time to change them.

Executive Editor Ann Steffora Mutschler finds that chip design innovations happen by a variety of means.

Synopsys’ Mary Ann White reports the results of a survey showing nearly a third of all designs target the most advanced process nodes, with 10nm coming on fast.

Cadence’s Brian Fuller notes that early impressions of the IoT aren’t all that impressive and there’s a lot to be done to make it work.

Mentor’s Robin Bornoff points to the importance of a package’s internal junction temperature, a key parameter because it’s linked to reliability and functional performance.

Ansys’ Muhammad Zakir argues that meeting a power budget and calling it a day is no longer good enough.

Atrenta’s Larry Vivolo observes that semiconductor design is a great model for other industries.

Nvidia’s Barry Pangrle takes an early look at UPF 3.0, saying attention is focused on a higher level of design abstraction, possibly with early modeling and estimation.