Blog Review: May 14

Ansys’ Bill Vandermark highlights the top five engineering articles of the week. Of particular note is element No. 117, a new entry in the periodic table. The temporary name is ununseptium, which means…well, surprise…117.

Cadence’s Brian Fuller follows a panel discussion about the biggest potential roadblock for the IoT’s success—privacy and security. You’ve been warned.

Synopsys’ Mick Posner unearths what he believes to be the ugliest T-shirts and posters in his company’s history. He’s probably right.

Mentor’s Colin Walls takes on exception handling in C++, which is designed to handle exceptional situations detected in the software. Users beware.

ARM’s Ed Plowman finds cosmic powers living in an itty-bitty space, enabled by massive compute power and huge bandwidth. And it’s amazing how easy it is to mess it up.

Semico Research’s Michell Prunty has discovered a lawnmower that you can program from your phone. It’s even quiet enough to run at night. Just imagine what could happen if this little twin-bladed monster gets hacked.

Breker’s Tom Anderson digs into graph-based verification and how to build a productive team to drive this approach. Anything that purports to reduce verification time and improve coverage is worth a look.

Cadence’s Kishore Kasamsetty digs deep into DDR4’s history and future in a Whiteboard Wednesdays video.

ARM’s Peter Harris walks through the proper way to handle framebuffers in OpenGL ES. If you work with graphics chips, grab a large cup of coffee.

Doug Rand and Stephanie Santoso of the  Office of Science and Technology Policy is dangling some bait for startups, which are in short supply in EDA these days following several years of overfishing. The U.S. Small Business Administration has launched a $2.5 million competition for startup accelerators. Maybe if they add a few more zeroes to the left of the decimal point things would really pick up.

And in case you missed the most recent Low Power-High Performance newsletter, here are some noteworthy blogs:

Executive Editor Ann Steffora Mutschler questions whether we are pushing available power around instead of truly saving it.

ARM’s Trina Watt puts a positive spin on screens and how smart they’re getting.

Mentor’s Colin Walls says it’s critical for embedded developers to rethink how they approach embedded system design.

Cadence’s Brian Fuller looks at the impact of 50 billion things drawing 1 watt and what to do about it.

Synopsys’ Ken Brock looks at whether a single design kit can optimize all CPUs, GPUs and DSPs.

Ansys-Apache’s Aveek Sarkar contends that an accurate, distributed package model is required to assure signoff quality results.

Calypto’s Anand Iyer argues that that current methodology needs rethinking to address gross and fine-grain techniques and the best low-power logic structure.

Atrenta’s Kiran Vittal examines the important ingredients of product CDC verification of both ASICs and FPGAs.