Playing Into China’s Hands


The fallout over blacklisting Huawei in particular, and China in general, has set the tone for a nasty global race. But it is almost certain to produce a different result than the proponents of a trade war are expecting. The idea behind tariffs and the blacklisting of Huawei is to starve China of vital technology. So far, the impact has been minimal. Reports from inside of China are equa... » read more

Building Your First Chip For Artificial Intelligence? Read This First


As artificial intelligence (AI) capabilities enter new markets, the IP selected for integration provides the critical components of the AI SoC. But beyond the IP, designers are finding a clear advantage in leveraging AI expertise, services, and tools to ensure the design is delivered on time, with a high level of quality and value to the end customer for new and innovative applications. Over... » read more

HBM2e Offers Solid Path For AI Accelerators


Today, AI processors are so blazingly fast that they’re constantly having to wait for data from memory. Unfortunately, with the status quo, memory is just not fast enough to unleash the true performance of those new and highly advancing AI processors. In simple terms, AI processor performance is rapidly growing, and memory is not keeping up. This creates a bottleneck, or what Rambus calls the... » read more

Why Chips Are Getting Noisier


In the past, designers only had to worry about noise for sensitive analog portions of a design. Digital circuitry was immune. But while noise gets worse at newer process nodes, staying at 28nm does not mean that it can be ignored anymore. With Moore's Law slowing, designs have to do more with less. Margins are being squeezed, additional concurrency is added, and attempts are made to opti... » read more

Waiting For Chiplet Interfaces


There aren't many success stories related to chiplets today for a very simple reason—there are few standard interfaces defined for how to connect them. In fact, the only way to use them is to control both sides of the interface with a proprietary interface and protocol. The one exception is the definition of HBM2, which enables large quantities of third-party DRAM to be connected to a logi... » read more

Speed Up P2P Resistance Debugging With Selective Highlighting


Point-to-point (P2P) resistance simulation calculates the effective parasitic resistance from one or more specified points (sources) to another set of points (sinks) on an integrated circuit (IC) layout. The results of these simulations are a key component in the verification of the robustness and reliability of IC layout interconnect—designers must have this information to accurately perform... » read more

Resetting Serial Memory When A System Failure Occurs


Stability is an important consideration in embedded design, but electronic systems can suffer malfunctions triggered by a myriad of root causes. These include poor signal integrity, power spikes, software errors, and erroneous user interaction, just to name a few. These anomalies, in turn, can lead to inconsistent system operation or can even cause the system to hang. Although the list of po... » read more

Memory Options And Tradeoffs


Steven Woo, Rambus fellow and distinguished inventor, talks with Semiconductor Engineering about different memory options, why some are better than others for certain tasks, and what the tradeoffs are between the different memory types and architectures.     Related Articles/Videos Memory Tradeoffs Intensify In AI, Automotive Applications Why choosing memories and archi... » read more

Deep Learning Models With MATLAB And Cortex-A


Today, I’ve teamed up with Ram Cherukuri of MathWorks to provide an overview of the MathWorks toolchain for machine learning (ML) and the deployment of embedded ML inference on Arm Cortex-A using the Arm Compute Library. MathWorks enables engineers to get started quickly and makes machine learning possible without having to become an expert. If you’re an algorithm engineer interested ... » read more

HBM2 Vs. GDDR6: Tradeoffs In DRAM


Semiconductor Engineering sat down to talk about new DRAM options and considerations with Frank Ferro, senior director of product management at Rambus; Marc Greenberg, group director for product marketing at Cadence; Graham Allan, senior product marketing manager for DDR PHYs at Synopsys; and Tien Shiah, senior manager for memory marketing at Samsung Electronics. What follows are excerpts of th... » read more

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