Application Of Richardson Extrapolation To The Co-Simulation Of FMUs From Building Simulation
By Fraunhofer IIS/EAS - 07 Mar, 2018 - Comments: 0

The application of the FMI technology gains ground in building simulation. As far as specialized tools support the FMI simulator coupling becomes an important option to simulate complex building models. Co-simulation needs a master algorithm which controls the communication time steps as well as the signal exchange between FMUs. Often a constant communication step size is applied chosen by the ... » read more

Mentor TLC NAND Softmodel Soft-Bit Error Injection
By Mentor, a Siemens Business - 07 Mar, 2018 - Comments: 0

Designing SSD controllers targeting NAND flash as the storage media requires some heavy lifting when it comes to dealing with the soft-errors that the flash will eventually produce. This paper will look at a method to simplify the design and verification required. We model these soft-bit behaviors with the Veloce emulator in a virtual setup, which reduces the time to market for an SSD. To r... » read more

Investors Back IoT Startups
By Jeff Dorsch - 07 Mar, 2018 - Comments: 0

Internet of Things startups took in more than $1.35 billion from corporate and private investors during the latter half of 2017, for a total of about $2.2 billion in the full year. Chicago-based Uptake Technologies, an Industrial IoT startup, had the biggest haul of the year, with $117 million raised in a Series D round, on top of a $90 million Series C round earlier in 2017, bringing its to... » read more

The Rambus GDDR6 PHY IP Core
By Rambus - 07 Mar, 2018 - Comments: 0

The JEDEC-compliant Rambus GDDR6 PHY IP Core is optimized for systems that require low-latency and high-bandwidth GDDR6 memory solutions. Available on leading FinFET process nodes, the PHY interface supports two independent channels, with each supporting 16 bits for a total data width of 32 bits. In addition, the PHY supports speeds up to 16Gbps per pin, providing a maximum bandwidth of up to 6... » read more

Blog Review: Mar. 7
By Jesse Allen - 07 Mar, 2018 - Comments: 0

Synopsys' Amit Paunikar and Shaily Khare take a look at new features in LPDDR5, from improved data bandwidth and Deep Sleep Mode to WCK clock. Cadence's Paul McLellan dives into forward error correction, a technique for automatically correcting errors in transmitted network data, with a look at why it's important and how it works. In his latest embedded software video, Mentor's Colin Wall... » read more

Manufacturing Bits: March 6
By Mark LaPedus - 06 Mar, 2018 - Comments: 0

Security ICs with multi-beam Leti, a research institute of CEA Tech, and Mapper Lithography have developed a new application for its multi-beam, direct-write lithography technology—security. In 2016, Mapper Lithography introduced the FLX-1200, a direct-write, multi-beam e-beam system. Using a 5-kV acceleration voltage, a beam generator creates an electron beam about 3cm in diameter. Then,... » read more

System Bits: March 6
By Ann Mutschler - 06 Mar, 2018 - Comments: 0

Printed graphene biosensors According to researchers at the Fraunhofer Institute for Biomedical Engineering IBMT in St. Ingbert (in Germany’s Saarland region), cell-based biosensors can simulate the effect of various substances, such as drugs, on the human body in the laboratory but depending on the measuring principle, producing them can be expensive. As such, they aren’t used very often.... » read more

Power/Performance Bits: Mar. 6
By Jesse Allen - 06 Mar, 2018 - Comments: 0

Neural network chip Neural networks are both slow and consume a lot of power. This made researchers at MIT examine the important aspects of the nodes within a neural network and to see how each part of the computation could be improved. The outcome was a dedicated chip that increases the speed of neural-network computations by three to seven times over its predecessors, while reducing power c... » read more

Is Advanced Packaging The Next SoC?
By Ed Sperling - 05 Mar, 2018 - Comments: 1

Device scaling appears to be possible down to 1.2nm, and maybe even beyond that. What isn't obvious is when scaling will reach that node, how many companies will actually use it, or even what chips will look like when foundries actually start turning out these devices using multi-patterning with high-NA EUV and dielectrics with single-digit numbers of atoms. There are two big changes playing... » read more

Xcerra: Back to the Drawing Board
By Jeff Dorsch - 05 Mar, 2018 - Comments: 0

It’s been nearly two weeks since Xcerra and Hubei Xinyan Equity Investment Partnership announced they have terminated their merger agreement in the face of apparent opposition by the Committee on Foreign Investment in the United States, the federal interagency panel that reviews transactions for their impacts on national security. Xcerra and Hubei Xinyan also withdrew their CFIUS application.... » read more

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