Fine-Grained Functional Partitioning For Low Level SRAM Cache in 3D-IC designs (imec)


A new technical paper titled "Towards Fine-grained Partitioning of Low-level SRAM Caches for Emerging 3D-IC Designs" was published by researchers at imec. "We propose a partitioning of low-level (faster access) caches in 3D using an Array Under CMOS (AuC) technology paradigm. Our study focuses on partitioning and optimization of SRAM bit-cells and peripheral circuits, enabling heterogeneous ... » read more

Memristors: Flexible Behavioral Model ( Israel Institute of Technology)


A new technical paper titled "VVTEAM: A Compact Behavioral Model for Volatile Memristors" was published by researchers at Technion – Israel Institute of Technology. Abstract "Volatile memristors have recently gained popularity as promising devices for neuromorphic circuits, capable of mimicking the leaky function of neurons and offering advantages over capacitor-based circuits in terms of... » read more

Novel NorthPole Architecture Enables Low-Latency, High-Energy-Efficiency LLM inference (IBM Research)


A new technical paper titled "Breakthrough low-latency, high-energy-efficiency LLM inference performance using NorthPole" was published by researchers at IBM Research. At the IEEE High Performance Extreme Computing (HPEC) Virtual Conference in September 2024, new performance results for their AIU NorthPole AI inference accelerator chip were presented on a 3-billion-parameter Granite LLM. ... » read more

Chip Industry Week In Review


Global spending on 300mm fab equipment is expected to reach a record US$400 billion from 2025 to 2027, according to SEMI. Key drivers are the regionalization of semiconductor fabs and the increasing demand for AI chips in data centers and edge devices, with China, South Korea, and Taiwan leading the way. The Biden-Harris Administration launched the National Semiconductor Technology Center’... » read more

Hardware Acceleration Approach for KAN Via Algorithm-Hardware Co-Design


A new technical paper titled "Hardware Acceleration of Kolmogorov-Arnold Network (KAN) for Lightweight Edge Inference" was published by researchers at Georgia Tech, TSMC and National Tsing Hua University. Abstract "Recently, a novel model named Kolmogorov-Arnold Networks (KAN) has been proposed with the potential to achieve the functionality of traditional deep neural networks (DNNs) using ... » read more

Flexible IGZO RISC-V Microprocessor


A new technical paper titled "Bendable non-silicon RISC-V microprocessor" was published by researchers at Pragmatic Semiconductor, Qamcom,  and Harvard University. From the abstract: "Here we present Flex-RV, a 32-bit microprocessor based on an open RISC-V instruction set fabricated with indium gallium zinc oxide thin-film transistors on a flexible polyimide substrate, enabling an ultralow... » read more

Dualtronics: Photonic Devices on the Cation Face and Electronic Devices on the Anion Face of the Same Wafer


A new technical paper titled "Using both faces of polar semiconductor wafers for functional devices" was published by researchers at Cornell University and Polish Academy of Sciences. Find the technical paper here. Published September 2024. Cornell University's news release is here, stating "Cornell researchers, in collaboration with a team at the Polish Academy of Sciences, have develope... » read more

Accelerating Reset Domain Crossing Verification With Data Analytics Techniques


By Reetika and Sulabh Kumar Khare As the complexity of integrated circuit (IC) designs continues to rise, the task of verifying these designs has become increasingly challenging. The pace of this growth is staggering, with design complexity doubling roughly every 20 months. This exponential increase places immense pressure on verification processes, which must keep up to ensure that these so... » read more

PAM4: Pulse Amplitude Modulation Explained


Pulse amplitude modulation (PAM) is already a widely adopted technology in high-speed digital communications. But to understand why it has become ubiquitous in serial data standards, you first must understand the market forces driving the data networking industry. In this article, I will explore PAM4 in-depth, from its benefits and potential tradeoffs to why it was an essential innovation that ... » read more

Enabling Innovative Multi-Vendor Chiplet-Based Designs


Chiplets have emerged as a critical implementation paradigm for semiconductor products, primarily because they can deliver cost benefits relative to a non-chiplet-based approach. The first, most well-proven, and obvious benefit of a chiplet-based approach is manufacturing cost. Manufacturing cost benefits are accrued either from the appropriate selection of chiplet die size, or by optimizin... » read more

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