category: IP And LP In SoCs

category: IoT, Security & Automotive

From Known Good Die To Known Good System With UCIe IP
By Manuel Mota - 11 May, 2023 - Comments: 0

Multi-die systems are made up of several specialized functional dies (or chiplets) that are assembled in the same package to create the complete system. Multi-die systems have recently emerged as a solution to overcome the slowing down of Moore’s law by providing a path to scaling functionality in the packaged chip in a way that is manufacturable with good yield. Additionally, multi-die sy... » read more

How eMRAM Addresses The Power Dilemma In Advanced-Node SoCs
By Rahul Thukral - 13 Apr, 2023 - Comments: 0

By Rahul Thukral and Bhavana Chaurasia Our intelligent, interconnected, data-driven world demands more computation and capacity. Consider the variety of smart applications we now have. Cars can transport passengers to their destinations using local and remote AI decision-making. Robot vacuum cleaners keep our homes tidy, and smartwatches can detect a fall and call emergency services. With hi... » read more

100G Ethernet IP For Edge Computing
By Jerry Lotto - 09 Mar, 2023 - Comments: 0

The presence of Ethernet in our lives has paved the way for the emergence of the Internet of Things (IoT). Ethernet has connected everything around us and beyond, from smart homes and businesses, to industries, schools, and governments. This specification is even found in our vehicles, facilitating communication between internal devices. Ethernet has enabled high-performance computing data cent... » read more

How To Raise Reliability, Availability, And Serviceability Levels For HPC SoCs
By Charlie Matar - 09 Feb, 2023 - Comments: 0

By Charlie Matar, Rita Horner, and Pawini Mahajan While once the domain of large data centers and supercomputers, high-performance computing (HPC) has become rather ubiquitous and, in some cases, essential in our everyday lives. Because of this, reliability, availability, and serviceability, or RAS, is a concept that more HPC SoC designers should familiarize themselves with. RAS may sound... » read more

Achieving Greater Accuracy In Real-Time Vision Processing With Transformers
By Gordon Cooper - 10 Jan, 2023 - Comments: 0

Transformers, first proposed in a Google research paper in 2017, were initially designed for natural language processing (NLP) tasks. Recently, researchers applied transformers to vision applications and got interesting results. While previously, vision tasks had been dominated by convolutional neural networks (CNNs), transformers have proven surprisingly adaptable to vision tasks like image cl... » read more

Ensuring Signal And Power Integrity In Today’s High-Speed Designs
By Pavani Jella - 08 Dec, 2022 - Comments: 0

Leading-edge chip desiLeading-edge chip design was never easy, but it’s getting harder all the time. Rapid advances in communication systems are driving data rates higher. With the emergence of artificial intelligence (AI) applications and the increased need for data processing, high quality data transfer is increasingly critical. Faster data rates and more complex protocols are exacerbating ... » read more

Accelerating IoT Designs: Designing For Low Power In The Era Of Smart Everything
By Ron Lowman - 10 Nov, 2022 - Comments: 0

Most of us have become accustomed to interacting with the ubiquitous technology ecosystem daily (if not hourly). From fitness trackers, smart vacuums, and semi-autonomous vehicles to the smart home devices that wake us up every morning, there’s no denying that the internet of things (IoT) boom has proliferated in every aspect of our lives. At the core of this instant, at-our-fingertips conn... » read more

Meeting Today’s Challenges For LVS
By Manoz Palaparthi - 13 Oct, 2022 - Comments: 0

At least one thing is for certain in semiconductor development: bigger and more complex designs put lots of pressure on electronic design automation (EDA) tools and methodologies. Yesterday’s chip is today’s IP block, and entire racks of electronics are being packed into system-on-chip (SoC) devices. EDA tools must evolve constantly in order to keep pace with size and complexity while meeti... » read more

What Is UCIe?
By Manuel Mota - 13 Sep, 2022 - Comments: 0

The semiconductor industry is undertaking a major strategy shift towards multi-die systems. The shift is fueled by several converging trends: Size of monolithic SoCs is becoming too big for manufacturability Some SoC functionalities may require different process nodes for optimal implementation Desire for enhanced product scalability and composability is increasing Multi-die syste... » read more

Signoff-Accurate Partial Layout Extraction And Early Simulation
By Soni Kapoor - 11 Aug, 2022 - Comments: 0

It is a rewarding experience for EDA developers and users to collaborate on deploying advanced techniques to improve design productivity. This blog will describe the experience of collaborating with customers on a new technology for reducing the number of analog design iterations. Analog design requires that engineers balance the needs to 1) reach market quickly 2) deliver high quality 3) at lo... » read more

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