category: Blogs – LPHP

category: IoT, Security & Automotive

ML Becomes Useful For Variation Coverage
By Ann Mutschler - 11 Oct, 2018 - Comments: 0

According to industry sources, it is quite a feat to get a chip back from the foundry that actually meets the specifications the design team worked towards, and because of this much effort is underway across the industry to understand what will happen to a design once it reaches the manufacturing stage, and what the effects of design choices actually are. AI and ML are absolutely the buzz wo... » read more

Re-using Common Simulation Set-Up Processes To Speed Regression
By Rohit Jain - 11 Oct, 2018 - Comments: 0

Functional verification of SoCs always has some kind of set up process. For complex SoCs, at least, this initial set up phase often consumes from 20 to 90% of each test’s total simulation time. And thousands of tests are run in the verification of a design. This set up phase could be either executing the exact same sequence of simulation steps, or programming the design to reach the same i... » read more

Overcoming Low Power Verification Challenges For Mixed-Signal SoC Designs
By Himanshu Bhatt - 11 Oct, 2018 - Comments: 0

With increasing SoC complexity and advanced power-aware architectures, a robust low power verification methodology is important for signing off the design at different stages from RTL through netlist. For mixed-signal SoCs, the challenge is, there is no well-defined low power methodology, nor are the industry’s low power verification tools equipped to handle custom designs. This article propo... » read more

Functional Safety And Requirements Engineering
By Roland Jancke - 11 Oct, 2018 - Comments: 0

Currently, dramatically increasing design costs are being reported for safety-critical applications. This is caused by additional necessary actions to implement and verify functional safety requirements. Such requirements are appearing with a clearly increasing tendency in the area of mobility (automotive, transport, aerospace) as well as in industrial automation and medical technology. In many... » read more

ADAS Further Extends 7nm Challenges
By Mondeep Thiara - 11 Oct, 2018 - Comments: 0

As we discussed previously on the LPHP blog, 7nm nodes hold great promise for reducing power, improving performance and increasing density for next-generation chips, but also present a set of engineering challenges. When you factor in the standards set for autonomous vehicles (AV) and advanced driver assistance systems (ADAS) system-on-chips or SoCs, those challenges can more than double. Autom... » read more

Processors Are Exciting Again
By Lazaar Louis - 11 Oct, 2018 - Comments: 0

Today is a very exciting time in the world of processor architectures. Domain-specific processor architectures are now fully realized as the best answers to the challenges of low power and high performance for many applications. Advancements in artificial intelligence are leading the way to exciting new experiences and products today and in our future. There have been more advances in deep lear... » read more

Electromagnetic Analysis and Signoff: Cost Savings
By Magdy Abadir - 18 Sep, 2018 - Comments: 0

By Nikolas Provatas and Magdy Abadir We are often asked by SoC design teams about the benefits of an electromagnetic analysis and signoff methodology. Here is an overview of some of the big “cost savings”. Time to Market Savings Utilizing an EM crosstalk analysis and signoff methodology provides designers with an “insurance policy” against the risk of EM coupling in their SOC des... » read more

Solving Puzzling Power-Aware Coverage: Getting An Aggregated Coverage Metric
By Progyna Khondkar - 13 Sep, 2018 - Comments: 0

Coverage metrics tell us when a design has been thoroughly verified, or at least exercised to the point of diminishing returns. Rarely can every design artifact or design parameter of a highly complex design be covered 100 percent, but we can use coverage metrics to know the extent to which we have verified the design — enough to be confident that it will function as desired in the end produc... » read more

Designers Face Growing Problems With On-Chip Power Distribution
By Marc Swinnen - 13 Sep, 2018 - Comments: 0

The technology evolution in semiconductor manufacturing has led to chips with ever-higher power densities, which is leading to serious problems with on-chip power distribution. Specifically, the problems surrounding voltage drop—or IR drop (from V=IxR)—have become so acute that we have seen multiple companies starting to get back dead silicon from the fab. For example, a recent 7nm chip ... » read more

Mission Profiles
By Jens Michael Warmuth - 13 Sep, 2018 - Comments: 1

In the field of electronic systems, the mission profile has been one of the key concepts since the start of the scientific examination of the subject of reliability. Its exact meaning varies with time and the industry using it. In particular, over the course of increasing digitalization and networking in the context of IoT and the opportunities resulting from this, the subject of mission profil... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy