AL 2012 – Day 2


There is no place I’d rather be on Valentine’s Day than in San Jose surrounded by my friends and colleagues in lithography.  No wait, I didn’t mean that.  I miss my wife and two young daughters.  I don’t like traveling without them. While Valentine’s Day is the Hallmark holiday I despise the most, it does serve to remind me of the conflicted feelings of most business travelers w... » read more

AL 2012 – Day 1


Attendance at this year’s Advanced Lithography Symposium is up 10% this year, to over 1500, though we still haven’t recovered from the huge drop in numbers that accompanied the economic collapse in 2009.  Still, the mood here is good.  When I ask people how they are doing the answer is almost universally the same:  busy.  And busy is what we will all be this week, trying to navigate the... » read more

AL 2012 – Day 4


As expected, the first EUV session of the last day of the conference filled a large room.  It was time to hear the status of EUV tool development, in particular the EUV sources.  ASML started things off with a rosy recounting of the successes of 2011.  After installing their sixth NXE:3100 preproduction tool, ASML bragged of the 5300 EUV wafers processed at customer sites by these six tools ... » read more

AL2012 – A Prologue


Yesterday I found my way to San Jose (a more arduous journey than in the past, since all direct flights from Austin to San Jose have disappeared like civility in American politics).  Another SPIE Advanced Lithography Conference is about to begin.  As usual, I will blog each day from my vantage as an overwhelmed conference participant.  And also as usual, I will set the stage for what I think... » read more

Tennant’s Law, Part 2


In the first part of this article, I talked about the empirically determined Tennant’s Law:  the areal throughput (At) of a direct-write lithography system is proportional to the resolution (R) to the fifth power.  In mathematical terms, At = kT R5 where kT is Tennant’s constant, and was equal to about 4.3 nm-3 s-1 in 1995 according to the data Don Tennant collected [1].  The power of ... » read more

High performance LEDs on Si wafers – the race is on


Light Emitting Diodes (LED’s) are about to pick up one of the key drivers from the low cost IC industry – Gallium Nitride (GaN) LED’s are being manufactured on large silicon wafers. This opens the future prospect of manufacturing 300 mm wafers filled with LED’s at a huge cost advantage. The larger area means that there are many more devices per process operation, which has driven the se... » read more

36% of Semiconductor Fabs at Risk from “Ring of Fire”


By Adrienne Downey It's called the "Ring of Fire". Actually more of a horseshoe shape, the "Ring of Fire" is an area of high seismic activity that extends from southeast of Australia north along the Pacific coast of Asia, crosses south of Alaska, and then continues south along the Pacific coast of all of North, Central and South America. According to Wikipedia, 90% of the world's earthquakes... » read more

Packaging Community Takes on New Challenges through Industry Collaboration


By Tom Salmon, senior director, SEMI As the semiconductor industry responds to increasing demands for lower power, higher performance and reduced form factor, packaging technologies are increasingly important.  This enhanced importance in the micro-electronics food chain is mirrored in a growth of the different segments of the packaging market.  According to the recently updated Global Sem... » read more

32nm SOI is GloFo Fab 8′s 1st Silicon


Excellent news for the fast-growing SOI community:  the first chips produced at GlobalFoundries’ “Fab 8″ in upstate New York are based on IBM’s latest, 32nm SOI chip technology. In a joint press release, the two companies announced that the chips will be used by customers in networking, gaming and graphics. While the new chips began initial production at IBM’s 300mm fab in East... » read more

Substrates for Semiconductor Packaging


2012 Market Outlook for Laminate and Leadframe Materials By Jan Vardaman, TechSearch International, and Dan Tracy, SEMI Combined, laminate substrates and leadframes will represent an estimated US$ 13.3 billion market in 2011 and is forecasted to reach $14 billion in 2012. This is larger than the revenues for silicon wafers (including silicon-on-insulator wafers) of $10.3 billion in 2011 and... » read more

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