Advanced Modeling In FTIR Offers New Applications For HVM


In the leading high-volume manufacturing (HVM) process flows, materials-enabled scaling has increased inline applications for compositional metrology. A previous blog discussed how Fourier transform infrared (FTIR) spectroscopy was used for inline composition measurements. These measurements informed advanced process control for the wafer-level processing of selectively etched 3D NAND wordli... » read more

Novel Reversible Chain Diagnosis Improves Resolution


Yield ramp for ICs designed on advanced process technologies faces new challenges because of the very complicated silicon defect types and defect distribution. Yield ramp and yield improvement are not just about profitability and time-to-market, but also have a role in today’s electronics supply chain crisis. That means yield ramp affects not just the IC maker, but the global economy. Ever... » read more

Automotive Keyless Entry SoC Test Methodologies And Techniques


By Philip Brock, Louis Benton, Jr., and Jonvyn Wongso Passive Entry Passive Start (PEPS) technology has become standard in the automotive market for keyless operation. A secure wireless communication system, PEPS enables you to lock and unlock the vehicle, and start and stop the vehicle without physically using the key. Electronic functionality embedded in the key fob to interact with the ve... » read more

Expanding Silicon Lifecycle Management To Real-Time System Performance Optimization


Semiconductor development is currently in one of its periodic crises, with many factors combining to require dramatically new technologies and methodologies. Chips continue to grow ever larger and more complex, with 3D IC devices adding another layer of challenges. Huge data centers, autonomous vehicles, and algorithms using artificial intelligence (AI) and machine learning (ML) drive a relentl... » read more

Strategies For Meeting Stringent Standards For Automotive ICs


It may surprise you, but when it comes to chips in electronic braking systems, airbag control units, and more, automotive manufacturers are still using 10-year-old technology — and with good reason. For the automotive industry, the reliability, stability, and robustness of electronic components are critical, especially when it comes to meeting the stringent Automotive Electronics Council (... » read more

Don’t Let X Be A Problem For Logic BIST


By Rahul Singhal and Giri Podichetty A failure in the operation of integrated circuits (ICs) or chips deployed in safety-critical applications such as automotive, medical, and aerospace could have catastrophic consequences. These failures could stem from defects in the chip that escaped manufacturing tests or from transient faults that can occur during system operation due to factors such as... » read more

Packetized Test At The International Test Conference 2021


At this year’s International Test Conference (October 10-15, 2021), Siemens Digital Industries Software is showcasing IC test and lifecycle management technologies that address the key scaling challenges facing the semiconductor industry now and in the future. The two main topics from Tessent at ITC are: The rapid adoption of packetized test strategies to address design and system... » read more

SLM Is Changing The Complete Device Lifecycle Process


Amit Sanghani, Vice President of Engineering, HW-Analytics and Test Group at Synopsys, discusses how Silicon Lifecycle Management (SLM) is changing the way we look at the complete device lifecycle process and how it can enable heightened levels of visibility in device performance, reliability and security. Learn how SLM is well placed to address the challenges that occur at every stage of cut... » read more

In The Spotlight: What Is Responsible For The Surging Demand For CIS?


After TSMC announced plans to construct a new fab in Arizona, the Taiwan-based company disclosed that they are considering building new fabs in Japan and Germany. While the Arizona fab will focus on producing 5nm nodes using extreme ultraviolet lithography (EUV) technology, the new plant in Japan reportedly would focus on the 28nm node. This 28nm fab in Japan would be in addition to a 28nm fab ... » read more

The Era Of Packetized Scan Test Has Arrived


For decades, process and design scaling has triggered the adoption of transformative test solutions. About twenty years ago, when at-speed test became a de-facto requirement, on-chip compression became the norm to address test data time and volume. Over the last decade, hierarchical DFT enabled DFT engineers to apply a divide and conquer on large design, improving both implementation effort and... » read more

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