Design Complexity In The Golden Age Of Semiconductors


While writing last month's blog that used some of the trend charts we have seen, I noticed that a lot of the data ends in 2020 or earlier, but I was too close to the deadline to sit down and make orderly updates to some of the charts. Working day-to-day in the area of SoC integration and networks-on-chips (NoCs), the classic chart based on Karl Rupp's now 50 years of processor data that overlay... » read more

Generative AI: Transforming Inference At The Edge


The world is witnessing a revolutionary advancement in artificial intelligence with the emergence of generative AI. Generative AI generates text, images, or other media responding to prompts. We are in the early stages of this new technology; still, the depth and accuracy of its results are impressive, and its potential is mind-blowing. Generative AI uses transformers, a class of neural network... » read more

Wide Bandgap Semiconductors: What Modeling Challenges Must We Overcome


As power electronics shrink in size, the demands on power, frequency, and efficiency grow exponentially. The semiconductor industry is leaning heavily into wide bandgap materials like gallium nitride (GaN) and silicon carbide (SiC) to help meet these demands. Recent research projects that the global GaN semiconductor devices market will grow at a CAGR of 25.4% from 2023 to 2030. However, the ... » read more

RISC-V Customization Gets A Standing Ovation


Processor vendors have always tried to create a large software ecosystem around their products, because it creates stickiness and it naturally “locks-in” large numbers of customers who have invested in the creation of dedicated software. This effect is growing over time as the quantity of software is ever increasing per product: we could talk about more than 100 million lines of code in a c... » read more

Why Shift Left?


As every integrated circuit (IC) design company knows, the faster a design can progress from implementation to signoff verification, the better the chances are of meeting tapeout schedules. Meeting tapeout schedules improves a company’s chances of reaching their market targets. But as companies create larger and more complex ICs and move to advanced process nodes, the challenge of achieving t... » read more

The Power Of Computational Software: From Revolutionizing Chips To Cancer Research


This post is an excerpt from the keynote presentation at CadenceLIVE India, given by Nimish Modi, senior vice president and general manager of Strategy and New Ventures at Cadence. The semiconductor industry has grown significantly lately but follows a cyclical pattern marked by fluctuations. Currently, we are witnessing a macro-level correction aimed at resolving inventory imbalances. N... » read more

Managing Voltage Variation


Engineers make many tradeoffs when designing SoC’s to better meet design specifications. Power, Performance and Area (PPA) are the primary goals and all three impact the cost of the implementation. For example, higher power and performance can both require more expensive packaging for power and signal integrity as well as cooling. The larger the die area the fewer die per wafer which drives u... » read more

A Packet-Based Architecture For Edge AI Inference


Despite significant improvements in throughput, edge AI accelerators (Neural Processing Units, or NPUs) are still often underutilized. Inefficient management of weights and activations leads to fewer available cores utilized for multiply-accumulate (MAC) operations. Edge AI applications frequently need to run on small, low-power devices, limiting the area and power allocated for memory and comp... » read more

DAC 2023: Megatrends And The Road Ahead For Design Automation


As Silicon Valley is in the midst of the heat wave the world is experiencing, the recent Design Automation Conference and its exhibition discussed hot technologies. Three megatrends defined the current situation – artificial intelligence (AI), chiplets, and integration. To me, the more exciting aspect of DAC was the discussion of what is ahead for EDA in the decade to come, and for that, the ... » read more

Context-Aware Analysis Can Automatically Protect Critical Nets And Devices During Fill Insertion


Context-aware physical verification (PV) is a relatively new addition to traditional PV flows, but it has quickly become a critical and essential technology that addresses the increasing complexity of geometrical checks used in both established and emerging integrated circuit (IC) technologies. Traditional electronic design automation (EDA) verification tools handle either the physical verifica... » read more

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