What Is Silicon Lifecycle Management? A Strategic Imperative


The recent buzz about silicon lifecycle management speaks to the boom in high-stakes electronic devices. Whether it is an SoC used in a vehicle or in the datacenter, there are compelling reasons to monitor and analyze data regarding the design, realization, deployment, and field service of the device. While silicon lifecycle management is an emerging paradigm in the semiconductor industry, i... » read more

What Is An ASIP?


ASIP stands for “application-specific instruction-set processor” and simply means a processor which has been designed to be optimal for a particular application or domain. General-purpose versus application- or domain-specific processors Most processor cores to date have been general-purpose, which means that they have been designed to handle a wide range of applications with good average... » read more

Cross Spectrum Video Processing


While immunization vaccines are rolling out at an impressive pace, and as society slowly reopens, our best defense against the Coronavirus continues to be early detection and rapid response (such as self-isolation). An early symptom of having the virus is an increased body temperature, which can be easily measured using contactless methods such as thermal sensors or cameras sensitive to IR r... » read more

Requirements For Exhaustive SoC Reset Domain Crossing Checks


It is common to read that the numbers of clock domains and power domains in system-on-chip (SoC) designs are increasing, but for some reason there is less discussion about resets. There is no doubt that the number of reset domains is also rising; studies have shown that the single reset of twenty years ago has been replaced by a complex network of 40-50 domains in many chips and even 150 in som... » read more

SoC Integration Complexity: Size Doesn’t (Always) Matter


It’s common when talking about complexity in systems-on-chip (SoCs) to haul out monster examples: application processors, giant AI chips, and the like. Breaking with that tradition, consider an internet of things (IoT) design, which can still challenge engineers with plenty of complexity in architecture and integration. This complexity springs from two drivers: very low power consumption, eve... » read more

Unlock Your Vision… And A Bit Of EDA History


Repetitive patterns and hardware designs have something in common: there may be more than meets the eye. Even simple designs can have corner cases that are hard to detect by code review alone, and the situation is even more complex if third-party or legacy IP is involved. What if the IP has a deliberately hidden function? This is where verification tools like OneSpin 360 come in, to remove huma... » read more

What Does RISC-V Stand For?


RISC-V (pronounced “risk-five”) stands for ‘reduced instruction set computer (RISC) five’. The number five refers to the number of generations of RISC architecture that were developed at the University of California, Berkeley since 1981. The RISC concept (like the parallel MIPS development in Stanford University) was motivated by the fact that most processor instructions were not... » read more

Find Bugs Early: On-The-Fly Code Correction For Design And Verification Productivity


The key rule for chip design and verification is that bugs must be found and fixed as early in the development process as possible. It is often said that catching a bug at each successive project stage multiplies the cost by ten. Bugs that escape verification and make their way to silicon are very expensive and time-consuming to fix. The ideal is to catch as many types of issues as possible as ... » read more

Digital Transformation In Aerospace And Defense Applications


Watching the aerospace and defense verticals, one of the most impactful publications in 2020 was probably Will Roper's "There Is No Spoon: The New Digital Acquisition Reality." Using visuals from "The Matrix", which at the time was called "the first movie of the 21st century," the Assistant Secretary of the Air Force for Acquisition, Technology, and Logistics painted a picture of a "simulation ... » read more

Aging Analysis Common Model Interface Gains Momentum


By Greg Curtis, Ahmed Ramadan, Ninad Pimparkar, and Jung-Suk Goo In February 2019, Siemens EDA wrote an article1 entitled “The Time Is Now for a Common Model Interface”. Since that time, we have continued to see increasing demand for aging analysis, not only in the traditional automotive space, but also in other areas of technology design, such as mobile communication and IoT application... » read more

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