Accelerate IP Software Development With Virtual Prototypes


Almost all electronics devices have some way to connect to other devices. While we don’t really think about it a lot, these interfaces actually have to be quite smart and need to deal with a lot of different device types and/or handle a great deal of data, preferably all while consuming as little power as possible. As a result, device drivers for this type of interface IP are non-trivial.... » read more

Playing With Bubbles


The first is in the social media world, where there simply are too many sites for a fixed population of users. Much has been written about this trend, including in this blog, and the big question is whether there is enough new business in new markets such as the IoT to soften the landing. The IoT has a long way to go, and a long way to grow. That growth will propel everything from the desig... » read more

NoC Reliability: Simplified


Recently, the reliability features of on-chip network (NoC) IP have received much attention. One reason for this focus has been the rush of companies to get into the automotive electronics market and the explosion of new automotive features being implemented in electronic systems. While the details may vary, the high-level view of on-chip network reliability is really quite simple. At the ar... » read more

Fast Followers And The Value of Virtual Prototyping


I am writing this blog while traveling though China. In this country of opportunities, new electronics companies show up regularly and some of them are quickly growing to become leaders in their application domain. Of course it helps if your local market is as big, if not bigger, than the U.S. and European market combined. The advantage of being a fast follower is that you can learn from th... » read more

Patents And EDA Making Waves


If the old adage “may you live in interesting times” is true, then lawyers must be wondering if they should be very happy or scared. The rate at which [getkc id="16" comment="patent"] law, and patents in general, are changing should give everyone pause – including the future competitiveness of the United States and the value of patents to EDA. The World Intellectual Property Organizati... » read more

System Design Enabling The Human Intranet


Against the always-impressive backdrop of the French Alps, DATE took place earlier this month in Grenoble. DATE has quietly transformed from a European version of DAC into a very interesting technical conference with some very high-caliber attendees. This year, I had the pleasure to participate as session chair for the design tools section, themed “Designing Electronics for the Internet of Th... » read more

Speaking IoT In Many Languages


Let’s face it, Internet of Things (IoT) is a hot topic. Depending on whom you believe, it’s a $300 billion to $19 trillion market opportunity involving 25 billion to 100 billion devices by 2020. These are all huge numbers – they could make Alan Turing himself dizzy. The sheer size of these numbers means good things for the market in general, and for some companies in the tech sector speci... » read more

Focus More Attention On The SoC’s Central Nervous System


In multiple conversations over the years, I’ve often compared the interconnect fabric within SoC designs to the central nervous system of the human body. The point that I try to make is that the potential of the SoC’s performance and functionality is tied to the information that travels through the fabric and interconnect to all the on-chip IP components. Improving a chip’s ability to com... » read more

Customized On-Chip Process Monitors


The sensitivity of digital circuits to process variations is continuously increasing with scaling in MOSFET devices. The effect of process variations has a substantial impact on the power, performance, and reliability of products. These process variations can be local or across the chip or wafer-to-wafer, or even lot-to-lot. These process variations need to be observed and analyzed in order to ... » read more

Chip-Package-Board Optimization: The Future Of Integrated Co-Design


Multi-die and three-dimensional packages have made breakout and routing of extremely high-pin-count devices on PCBs very difficult. Keeping track of all the signals and pins is also a task that has just about outgrown current methods. Many companies simply use a spreadsheet for tracking signals. With no central database or accurate device modeling and rule-based optimization, design intent is o... » read more

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