Requirements For The Efficient Implementation Of AI Solutions On Edge Devices


By André Schneider, Olaf Enge-Rosenblatt, and Björn Zeugmann In recent years, there has been a growing tendency to implement data-driven approaches for the continuous monitoring of industrial plants as part of digitalization and Industry 4.0 initiatives. The hope is to detect critical conditions at an early stage, minimize maintenance and downtimes, and continuously achieve high product qu... » read more

Next-Gen Power Integrity Challenges


Experts at the Table: Semiconductor Engineering sat down to discuss power integrity challenges and best practices in designs at 7nm and below, and in 2.5D and 3D-IC packages, with Chip Stratakos, partner, physical design at Microsoft; Mohit Jain, principal engineer at Qualcomm; Thomas Quan, director at TSMC; and Murat Becer, vice president at Ansys. What follows are excerpts of that conversatio... » read more

Advanced Design Debug Demands Integrated Verification Management


Design verification has been the dominant portion of chip development for years, and the challenges grow bigger every day. Single dies continue to grow in transistor count and complexity. Advanced techniques such as 2.5D and 3D multi-die systems and emerging technologies such as wafer-scale integration pack even more transistors and functionality into a single device. This situation has created... » read more

What Is SMU Digitizer Mode And Why Is It Useful?


Some source/measure unit (SMU) products support a feature called “digitizer mode.” However, from the title alone it is not obvious exactly what this feature means. This capability is related to the triggering system of the SMU, so it is helpful to review the ARM-TRIGGER model first. Keysight products supporting the standard commands for programmable instrument (SCPI) adhere to the trigge... » read more

Decoding GDS To Thermal Model Conversion


Driven by Moore’s Law and modern, ubiquitous computation power demand, the market will continue to demand higher chip performance. Therefore, modern chips with ever-higher power densities present critical thermal challenges. With the ever-shrinking design margins, designers must manage their thermal budget at every stage of the design, from chip to system. Now, let us shift left and start ... » read more

Arm Statistical Profiling Extension: Performance Analysis Methodology


This paper presents a methodology for workload characterization and root cause analysis using the Arm Statistical Profiling Extension (SPE) demonstrated on a Neoverse N1 core. The target audience are software developers and performance analysts in software development, analysis, optimization, and tuning. This paper may also help silicon engineers to conduct performance analysis and debugging. T... » read more

Imagining A Hydrogen-Powered Future Thanks To Simulation


Our world leaders have set ambitious goals for global decarbonization by 2050, with good reason. While the planet continues to heat up, global energy consumption is still rising, and most of this energy consumption is currently derived from fossil fuels. This bitter truth has inspired a wave of decarbonization trends in response — including green hydrogen, which is generated using renewable ... » read more

Very Short Reach SerDes In Data Centers


Speed is critical inside of data centers, and the distance that signals have to travel can have a big impact on time to results. But there are a number of variables that need to be considered, including what is an acceptable loss, how much power can be dissipated in a server rack, and what are the various connection options being used. Keivan Javadi Khasraghi, staff technical product manager at... » read more

Demystifying Mixed-Signal Simulation For Digital Verification Engineers


The convergence of analog and digital technologies on a single chip, commonly referred to as mixed-signal, has reshaped the integrated circuit (IC) landscape. In recent years, mixed-signal designs have emerged as the dominant technology, therefore requiring traditional analog and digital methodologies to be enhanced. A mixed-signal design offers many advantages, including boosted performance, r... » read more

HBM3 Memory: Break Through to Greater Bandwidth


Delivering unrivaled memory bandwidth in a compact, high-capacity footprint, has made HBM the memory of choice for AI/ML and other high-performance computing workloads. HBM3 as the latest generation of the standard raises data rates to 6.4 Gb/s and promises to scale even higher. The Rambus HBM3 controller provides industry-leading support of the extended roadmap for HBM3 with performance to 9.6... » read more

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