category: Low Power-High Performance

category: IoT, Security & Automotive

Research Bits: Apr. 7
By Jesse Allen - 07 Apr, 2025 - Comments: 0

DNA scaffolds for 3D electronics Researchers from Columbia University, Brookhaven National Laboratory, and University of Minnesota used DNA to help create self-assembled 3D electronic devices with nanometer-size features. The team deposited arrays of gold squares on a surface, onto which they could attach short pieces of DNA. These served as anchors to which they could fasten eight-sided di... » read more

Research Bits: Apr. 1
By Jesse Allen - 01 Apr, 2025 - Comments: 0

Neuro-synaptic RAM Researchers from the National University of Singapore (NUS) and King Abdullah University of Science and Technology (KAUST) found that a standard silicon transistor can function like a biological neuron and synapse when arranged and operated in a specific way. The team was able to replicate both neural firing and synaptic weight changes by adjusting the resistance of the b... » read more

Research Bits: Mar. 25
By Jesse Allen - 25 Mar, 2025 - Comments: 0

2D materials in 3D transistors Researchers at the University of California Santa Barbara investigated 3D gate-all-around (GAA) transistors made using 2D semiconductors. They considered three different approaches to channel stacking: nano-sheet FETs, nano-fork FETs, and nano-plate FETs. The nano-plate FET architecture, which exploits lateral stacking of 2D layers, was found to maximize the g... » read more

Research Bits: Mar. 18
By Jesse Allen - 18 Mar, 2025 - Comments: 0

High-frequency signal conversion Researchers from ETH Zurich developed a plasmonic modulator capable of converting electrical signals into optical signals with a frequency of over a terahertz. The modulator is a tiny nanostructure made up of various materials, including gold, and makes use of the interaction between light and free electrons within the gold. It converts signals directly, red... » read more

New Data Center Protocols Tackle AI
By Bryon Moyer - 17 Mar, 2025 - Comments: 1

Compute nodes in AI and HPC data centers increasingly need to reach out beyond the chip or package for additional resources to process growing workloads. They may commandeer other nodes in a rack (scale-up) or employ resources in other racks (scale-out). The problem is there currently is no open scale-up protocol. So far this task has been dominated by proprietary protocols, because much of ... » read more

Reducing Voltage Guard Band
By Barry Pangrle - 13 Mar, 2025 - Comments: 0

The 2025 International Solid State Circuits Conference was held in San Francisco from February 16th to 20th. IBM presented three papers[1,2,3] based on their Samsung 5nm Tellum II chip. These are interesting in terms of the technology and the specifics about the design and measures taken to improve energy efficiency and reduce power. My first remembrance of a company specializing in guard-ba... » read more

Easier Assertion Development And Debug With Simulation Replay
By Vin Liao - 13 Mar, 2025 - Comments: 0

By Vin Liao and Robert Ruiz Assertions and assertion IP (AIP) are a core part of the register transfer level (RTL) verification environment for all modern chip development projects. Assertions can be considered as statements of design intent, specifying how the design should behave—and not behave—under specified conditions. They range from simple statements, for example, that a multi-bit... » read more

Enabling Next-Generation Automotive Zonal Architecture With MIPI
By Raj Uppala - 13 Mar, 2025 - Comments: 0

The evolution of automotive architecture has followed three key stages: distributed architecture, domain-centralized architecture, and emerging zonal architecture. Each stage reflects advancements in functionality, complexity, and efficiency. Distributed architecture, prevalent in early vehicles, relied on numerous function-specific Electronic Control Units (ECUs). While effective for modularit... » read more

Fulfilling 3D-IC Trade-Off Analyses (And Benefits) With An AI Assist
By Pratyush Kamal - 13 Mar, 2025 - Comments: 0

As we walk around with supercomputers in our pockets and work at desks on even more powerful supercomputers, a lot of processing has moved to the cloud. As a politician described, this can be problematic on a day when there are no clouds in the sky. The world discovered the truth of those words when Crowdstrike struck on July 19, 2024. System designers who spent years balancing power, performan... » read more

Static Timing Analysis: Cell Delay Vs. Cell Drive Strength
By Pamula Sai Srinivas - 13 Mar, 2025 - Comments: 0

Have you ever wondered how a predator succeeds or its prey escapes in the jungle? It’s the breathtaking speed and agility of the predator (say, a leopard) as it chases prey (say, a deer). The VLSI circuit operation is very similar. If the driving cell is strong, it takes less delay and changes the output quicker than a weaker driver, which produces a sluggish response and takes longer t... » read more

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