category: Low Power-High Performance

category: Auto, Security & Edge AI

Harnessing Artificial Intelligence For Trusted IC Signoff
By Carey Robertson - 14 May, 2026 - Comments: 0

After years of behind-the-scenes work, artificial intelligence (AI) is now embedded throughout the technology world—from space exploration to everyday apps on our smartphones. There is a circular feedback loop in which we design more powerful computer chips to train AI models and use them; and then use those AI models to design even more powerful chips. The use of AI in the software used for ... » read more

ASIC Prototyping — New Design Realities Demand A New Approach
By Siemens EDA - 14 May, 2026 - Comments: 0

Modern ASIC design pushes prototypes to model vast RTL interactions across many FPGAs, often under high-bandwidth conditions that strain traditional systems. Verification teams also need fluid movement between emulation and at-speed prototyping, exposing any gaps in flow, tooling, or model continuity. This white paper presents an integrated solution that addresses these challenges through a uni... » read more

Scaling PCIe Controllers for AI Bandwidth: A Multistream Architecture Analysis for 64 GT/s and 128 GT/s
By Synopsys - 13 May, 2026 - Comments: 0

Scaling raw lane speed without rethinking controller microarchitecture leads to diminishing returns. It introduces multistream architecture, a controller‑level re‑architecture designed to sustain effective bandwidth under mixed and small‑packet workloads. This paper examines the architectural inflection point at PCIe 6.0, details transmit‑ and receive‑side changes required for multist... » read more

Research Bits: May 11
By Jesse Allen - 11 May, 2026 - Comments: 0

Non-destructive terahertz inspection Researchers from Adelaide University, Virginia Diodes, the Hasso Plattner Institute, and the University of Potsdam used terahertz waves to observe electrical activity inside fully packaged semiconductor devices as they are operating. The technique relies on an ultra-sensitive detection system using a specialized homodyne quadrature receiver, which can pi... » read more

Research Bits: May 5
By Jesse Allen - 05 May, 2026 - Comments: 0

AI power prediction Researchers from MIT and the MIT-IBM Watson AI Lab developed a prediction tool that can quickly tell data center operators how much power will be consumed by running a particular AI workload on a certain processor or AI accelerator chip. It can be applied to a wide range of hardware configurations. The lightweight estimation model captures the power usage pattern of a GP... » read more

New CPU Memory Module
By Ed Sperling - 28 Apr, 2026 - Comments: 0

Moving data has become the top challenge inside data centers. There is more data to process, more to move, and more to store and retrieve from memory. This is where small outline compression attached memory modules (SOCAMMs) fit in. Frank Ferro, group director for product management at Cadence, talks about the benefits of this next-gen modular low-power memory standard, how it compares with oth... » read more

Research Bits: Apr. 28
By Jesse Allen - 28 Apr, 2026 - Comments: 0

Parchment papertronics Researchers from Binghamton University used commercial parchment paper, commonly used in baking, along with a standard carbon dioxide laser and water-based conductive ink to create disposable, single-use electronic circuits. The laser selectively removes the paper's thin silicone coating in specific patterns, exposing the water-absorbing cellulose fibers underneath. T... » read more

Can Edge AI Keep Up?
By Ann Mutschler - 23 Apr, 2026 - Comments: 0

Key Takeaways: Model development is outpacing silicon design cycles, so edge AI architectures must prioritize adaptability. The required cadence for model updates is highly application-dependent and is closely tied to product lifetime and operational risk. Adaptability can conflict with power, performance, and area targets, so effective heterogeneous architectures and robust softwa... » read more

Research Bits: Apr. 21
By Jesse Allen - 21 Apr, 2026 - Comments: 0

Compute-in-memory state space models Researchers from the University of Michigan mapped complex state space models directly onto a compute-in-memory architecture in an example of hardware-software co-design for edge AI. "Compute-in-memory systems offer very high energy efficiency and throughput, but they are rigid and not optimal for convolution and transformer networks. In this study, we s... » read more

Why More CPUs Are Needed For Agentic AI
By Ed Sperling - 15 Apr, 2026 - Comments: 0

The shift from generative AI to agentic AI will significantly increase the amount of compute power needed in data centers. Queries to search for and analyze data from multiple sources will be performed simultaneously by agents and without human intervention, rather than a single request from a live person. Jeff Defilippi, senior director of product management at Arm, talks about the impact of r... » read more

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